参数资料
| 型号： | ISL6566CR |
| 厂商： | Intersil |
| 文件页数： | 14/29页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR PWM BUCK 3PHASE 40-QFN |
| 标准包装： | 50 |
| 应用： | 控制器，Intel VRM9，VRM10，AMD Hammer 应用 |
| 输入电压： | 3 V ~ 12 V |
| 输出数： | 1 |
| 输出电压： | 0.8 V ~ 1.6 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 40-VFQFN 裸露焊盘 |
| 供应商设备封装： | 40-QFN（6x6） |
| 包装： | 管件 |
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ISL6566
TABLE 4. VRM10 VOLTAGE IDENTIFICATION CODES (Continued)
EXTERNAL CIRCUIT
ISL6566 INTERNAL CIRCUIT
VID4
1
1
1
VID3
1
1
1
VID2
0
0
0
VID1
1
0
0
VID0
0
1
1
VID12.5
0
1
0
VDAC
1.2125
1.2250
1.2375
R C
C C
COMP
REF
VID DAC
1k
1
1
0
0
0
1
1.2500
C REF
+
1
1
0
0
0
0
1.2625
FB
-
V COMP
1
1
0
0
1
1
1
1
1
1
1
0
1.2750
1.2875
R FB
+
V OFS
-
VDIFF
ERROR AMPLIFIER
I OFS
1
0
1
1
0
1
1.300
1
0
1
1
0
0
1.3125
VSEN
1
1
0
0
1
1
0
0
1
1
1
0
1.3250
1.3375
+
V OUT
-
RGND
+
+
1
1
0
0
1
1
0
0
0
0
1
0
1.3500
1.3625
+
V DROOP
IREF
-
-
1
0
0
1
1
1
1.3750
-
ICOMP
DIFFERENTIAL
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1.3875
1.4000
1.4125
1.4250
1.4375
1.4500
1.4625
1.4750
1.4875
1.5000
1.5125
1.5250
1.5375
1.5500
1.5625
1.5750
1.5875
1.6000
REMOTE-SENSE
AMPLIFIER
FIGURE 6. OUTPUT VOLTAGE AND LOAD-LINE
REGULATION WITH OFFSET ADJUSTMENT
The ISL6566 incorporates an internal differential remote-
sense amplifier in the feedback path. The amplifier removes
the voltage error encountered when measuring the output
voltage relative to the controller ground reference point,
resulting in a more accurate means of sensing output
voltage. Connect the microprocessor sense pins to the non-
inverting input, VSEN, and inverting input, RGND, of the
remote-sense amplifier. The droop voltage, V DROOP , also
feeds into the remote-sense amplifier. The remote-sense
output, V DIFF , is therefore equal to the sum of the output
voltage, V OUT , and the droop voltage. V DIFF is connected to
the inverting input of the error amplifier through an external
resistor.
The output of the error amplifier, V COMP , is compared to the
sawtooth waveform to generate the PWM signals. The PWM
signals control the timing of the Internal MOSFET drivers
and regulate the converter output so that the voltage at FB is
equal to the voltage at REF. This will regulate the output
voltage to be equal to Equation 4. The internal and external
circuitry that controls voltage regulation is illustrated in
Voltage Regulation
Figure 6.
In order to regulate the output voltage to a specified level,
the ISL6566 uses the integrating compensation network
shown in Figure 6. This compensation network insures that
V OUT = V REF – V OFS – V DROOP
(EQ. 4)
the steady-state error in the output voltage is limited only to
the error in the reference voltage (output of the DAC) and
offset errors in the OFS current source, remote-sense and
error amplifiers. Intersil specifies the guaranteed tolerance of
the ISL6566 to include the combined tolerances of each of
these elements.
14
Load-Line (Droop) Regulation
Some microprocessor manufacturers require a precisely-
controlled output impedance. This dependence of output
voltage on load current is often termed “droop” or “load line”
regulation.
FN9178.4
March 9, 2006
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