参数资料
| 型号： | ISL8126IRZ |
| 厂商： | Intersil |
| 文件页数： | 32/39页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM VM 32-QFN |
| 标准包装： | 60 |
| PWM 型： | 电压模式 |
| 输出数： | 2 |
| 频率 - 最大： | 1.5MHz |
| 占空比： | 90% |
| 电源电压： | 3 V ~ 5.6 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 32-VFQFN 裸露焊盘 |
| 包装： | 管件 |
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ISL8126
VIN
R EN/VFF_up
R EN/VFF_low
With
voltage
loop
EN/VFF1,2 COM1/2
VSEN1+ CLKOUT
VSEN1-
ISL8126 1
EN/VFF1,2 COM1/2
FSYNC
VSEN1/2-
VCC ISL8126 2
EN/VFF1,2 COM1/2
FSYNC
VSEN1/2-
VCC ISL8126 3
ISHARE
ISET
ISHARE
ISET
CLKOUT
ISHARE
ISET
R ISHARE1
R ISET1
R ISHARE2
R ISET2
R ISHARE3
R ISET3
SHARE BUS
R ISHARE_ = R ISET_
FIGURE 23. SIMPLIFIED 6-PHASE SINGLE OUTPUT IMPLEMENTATION
Current Share Control Loop in Multi-Module
with Independent Voltage Loop
The power module controlled by ISL8126 with its own voltage
loop can be paralleled to supply one common output load with its
integrated Master-Slave current sharing control, as shown in the
“Typical Application Circuits” on page 14. A resistor R CSR and a
capacitor C CSR need to be inserted between VSEN1- pin and the
lower resistor of the voltage sense resistor divider for each
module. With this resistor, the correction current sourcing from
the VSEN1- pin will create a voltage offset to maintain even
bypass ceramic capacitors (10μF) connected to GND for proper
operation. PVCC can be used to bias the IC analog circuitry, VCC,
by connecting VCC to PVCC pin. The VCC pin should be connected
to the PVCC pin with an RC filter to prevent high frequency driver
switching noise into the analog circuitry. When the V IN drops
below 5.0V, the pass element will saturate; PVCC will track V IN
with a dropout of the linear regulator. When used with an
external supply less than 5V, the PVCC pin is recommended to be
tied directly to V IN .
2.65V TO 5.6V 3V TO 26.5V
current sharing among modules. The recommended value for the
VSEN1- resistor R CSR is 100 Ω and it should not be large in order
to keep the unity gain amplifier input pin impedance
1μF
2 Ω
10μF
compatibility. The maximum source current from the VSEN1- pin
VCC
PVCC
VIN
is 350μA, which is combined with R CSR to determine the current
sharing regulation range. The generated correction voltage on
R CSR is suggested to be within 5% of VREF (0.6V) to avoid fault
triggering of UV/OV and PGOOD during dynamic events. The
Z1
C CSR = -------------------------------
value for C CSR can be estimated from Equation 14.
35
R CSR × F SW
(EQ. 14)
Z2
Where F SW is switching frequency.
It is recommended to have 3 analog signals: CLKOUT-SYNC,
ISHARE, and EN/VFF for communication among the paralleled
modules. All the modules are synchronized and the phase shift
can also be configured to optimal to reduce the input current
ripple by interleaving effects. The connections of these three
wires allows the system to be started at the same time and
achieve good current balance in start-up without overcurrent trip.
Internal Series Linear and Power
Dissipation
The VIN pin is connected to PVCC with an internal series linear
regulator. The internal linear regulator’s input (VIN) can range
between 3V to 26.5V. PVCC pin is the output of the internal linear
regulator and it provides power for both the internal MOSFET
drivers. The PVCC and VIN pins should have the recommended
32
5V
FIGURE 24. INTERNAL REGULATOR IMPLEMENTATION
The LDO is capable of supplying 250mA with regulated 5.4V
output. In 3.3V input applications, when the VIN pin voltage is 3V,
the LDO can still supply 150mA while maintaining LDO output
voltage higher than VCC falling threshold to keep the IC
operating. Figure 3 shows the typical V-I curve of the internal
LDO. Note that the power dissipation in the device should not be
exceeded the package thermal limit. The power dissipation
inside the IC can be estimated with Equations 14 and 16.
Where the gate charge (Q G1 and Q G2 ) is defined at a particular
gate to source voltage (V GS1 and V GS2 ) in the corresponding
MOSFET datasheet; I Q_VIN is the driver’s total quiescent current
with no load at drive outputs; N Q1 and N Q2 are number of upper
and lower MOSFETs, respectively.
FN7892.1
August 16, 2012
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL8126IRZ-T | 功能描述:IC REG CTRLR BUCK PWM VM 32-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL8126IRZ-T7A | 制造商:Intersil Corporation 功能描述:SCALABLE 2-PHASE CONTROLLER W/INTEGRATED DRIVERS, IND, 32LD - Tape and Reel 制造商:Intersil Corporation 功能描述:IC REG CTRLR BUCK PWM VM 32-QFN |
| ISL8126IRZ-TK | 功能描述:IC REG CTRLR BUCK PWM VM 32-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL8128IAZ-TK | 制造商:Intersil Corporation 功能描述:PB-FREE SYNC BUCK PWM CONT. W/ 4.5V-28V |
| ISL8130 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Advanced Single Universal Pulse-Width Modulation (PWM) Controller |
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