参数资料
型号: ISL8126IRZ
厂商: Intersil
文件页数: 35/39页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 32-QFN
标准包装: 60
PWM 型: 电压模式
输出数: 2
频率 - 最大: 1.5MHz
占空比: 90%
电源电压: 3 V ~ 5.6 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 32-VFQFN 裸露焊盘
包装: 管件
ISL8126
VOUT
R FB
R OS
R OS
R FB
Z COMP
VCC
VSEN+
GND
VSEN-
VMON
FB
COMP
PGOOD
400mV
GAIN=1
V REF
OV/UV
COMP
ERROR AMP
PGOOD
FIGURE 31. DUAL OUTPUT VOLTAGE SENSE FOR SINGLE POINT OF FAILURE PROTECTION
? R FB ? ( 1 – R% ) ?
%min = ( Vref ? ( 1 – Ref% ) – V OS_DA ) ? ? ?
R OSMAX
As some applications will not need the differential remote sense,
the output of the remote sense buffer can be disabled and be
placed in high impedance by pulling VSEN- within 400mV of VCC.
? ?
1 + --------------------------------------
R OSMAX = -----------------------------------------------------------------------------------------------
1 1
R OS ? ( 1 + R% )
R DIF ? ( 1 + R DIF % )
%max = ( Vref ? ( 1 – Ref% ) – V OS_DA ) ? ? 1 + -------------------------------------- ?
R OSMIN = ------------------------------------------------------------------------------------------
1 1
R OS ? ( 1 – R % )
R DIF ? ( 1 – R DIF % )
Thus, the VMON pin can be used as an additional monitor of the
output voltage with a resistor divider to protect the system
against single point of failure, which occurs in the system using
the same resistor divider for the UV/OV comparator and the
output regulation. The resistor divider ratio should be the same
as the one for the output regulation so that the correct voltage
information is provided to the OV/UV comparator. Figure 31
shows the differential sense amplifier can be directly used as a
monitor without pulling VSEN- high.
Internal Reference and System Accuracy
The internal reference is set to 0.6V. Including bandgap variation
and offset of differential and error amplifiers, it has an accuracy
1
--------------------------------------- + -------------------------------------------------
? R FB ? ( 1 – R% ) ?
? R OSMIN ?
1
------------------------------------ + ----------------------------------------------
(EQ. 19)
(EQ. 20)
of ±0.6% over commercial temperature range, and 0.9% over
industrial temperature range. While the remote sense is not
used, its offset (V OS_DA ) should be included in the tolerance
calculation. Equations 18 and 19 show the worst case of system
accuracy calculation. V OS_DA should set to zero when the
differential amplifier is in the loop, the differential amplifier’s
input impedance (R DIF ) is typically -600k Ω with a tolerance of
20% (RDIF%) and can be neglected when R OS is less than 100 Ω .
To set a precision setpoint, R OS can be scaled by two paralleled
resistors.
Figure 32 shows the tolerance of various output voltage
regulation for 1%, 0.5%, and 0.1% feedback resistor dividers.
Note that the farther the output voltage setpoint away from the
2.5
2.0
1.5
1.0
0.5
0.0
-0.5
-1.0
-1.5
R% = 1%
0.5%
0.1%
0.1%
0.5%
internal reference voltage, the larger the tolerance; the lower the
resistor tolerance (R%), the tighter the regulation.
-2.0
-2.5
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
1%
4.5
5.0
OUTPUT VOLTAGE (V)
FIGURE 32. OUTPUT REGULATION WITH DIFFERENT RESISTOR
TOLERANCE FOR Ref% = ± 0.6%
35
FN7892.1
August 16, 2012
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