参数资料
型号: LTC3731CG#TRPBF
厂商: Linear Technology
文件页数: 26/34页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 36-SSOP
标准包装: 2,000
系列: PolyPhase®
PWM 型: 电流模式
输出数: 1
频率 - 最大: 750kHz
占空比: 98.5%
电源电压: 4 V ~ 36 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: 0°C ~ 70°C
封装/外壳: 36-SSOP(0.209",5.30mm 宽)
包装: 带卷 (TR)
LTC3731
APPLICATIONS INFORMATION
( 1– 3DC ) V IN > 3V OUT
I P-P =
SimplifiedVisualExplanationofHowa3-Phase
Controller Reduces Both Input and Output RMS
Ripple Current
The effect of multiphase power supply design significantly
reduces the amount of ripple current in both the input and
output capacitors. The RMS input ripple current is divided
by, and the effective ripple frequency is multiplied up by
the number of phases used (assuming that the input volt-
age is greater than the number of phases used times the
output voltage). The output ripple amplitude is also reduced
by, and the effective ripple frequency is increased by the
number of phases used. Figure 13 graphically illustrates
the principle.
The worst-case input RMS ripple current for a single stage
design peaks at twice the value of the output voltage. The
worst-case input RMS ripple current for a two stage design
results in peaks at one-fourth and three-fourths of the
input voltage, and the worst-case input RMS ripple cur-
rent for a three stage design results in peaks at one-sixth,
one-half and five-sixths of the input voltage. The peaks,
however, are at ever decreasing levels with the addition
of more phases. A higher effective duty factor results
because the duty factors “add” as long as the currents
in each stage are balanced. Refer to AN19 for a detailed
description of how to calculate RMS current for the single
stage switching regulator.
Figure 6 illustrates the RMS input current drawn from
the input capacitance versus the duty cycle as determined
by the ratio of input and output voltage. The peak input
RMS current level of the single phase system is reduced
by two-thirds in a 3-phase solution due to the current
splitting between the three stages.
The output ripple current is reduced significantly when
compared to the single phase solution using the same
inductance value because the V OUT /L discharge currents
term from the stages that has their bottom MOSFETs on
subtract current from the (V CC – V OUT )/L charging current
resulting from the stage which has its top MOSFET on.
The output ripple current for a 3-phase design is:
V OUT
( f ) ( L )
SINGLE PHASE
V SW
I CIN
I COUT
TRIPLE PHASE
V SW1
V SW2
V SW3
I L1
I L2
I L3
I CIN
I COUT
3731 F13
Figure 13. Single and PolyPhase Current Waveforms
3731fc
26
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