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参数资料
| 型号： | LXT386LE |
| 英文描述： | PCM TRANSCEIVER|QUAD|CEPT PCM-30/E-1|CMOS|QFP|100PIN|PLASTIC |
| 中文描述： | 的PCM收发器|四|优税PCM-30/E-1 |的CMOS | QFP封装| 100引脚|塑料 |
| 文件页数： | 5/80页 |
| 文件大小： | 1112K |
| 代理商： | LXT386LE |
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Datasheet
5
Octal T1/E1/J1 Line Interface Unit
—
LXT384
36
37
Low Quad Flat Packages (LQFP) Dimensions....................................................78
Plastic Ball Grid Array (PBGA) Package Dimensions.........................................79
Tables
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LXT384 Pin Description.......................................................................................11
Line Length Equalizer Inputs...............................................................................27
Jitter Attenuation Specifications..........................................................................30
Operation Mode Summary..................................................................................34
Microprocessor Interface Selection.....................................................................35
Serial and Parallel Port Register Addresses.......................................................38
Register Bit Names .............................................................................................39
ID Register, ID (00h) ...........................................................................................40
Analog Loopback Register, ALOOP (01h) ..........................................................40
Remote Loopback Register, RLOOP (02h).........................................................40
TAOS Enable Register, TAOS (03h)...................................................................40
LOS Status Monitor Register, LOS (04h)............................................................41
DFM Status Monitor Register, DFM (05h)...........................................................41
LOS Interrupt Enable Register, LIE (06h) ...........................................................41
DFM Interrupt Enable Register, DIE (07h)..........................................................41
LOS Interrupt Status Register, LIS (08h) ............................................................41
DFM Interrupt Status Register, DIS (09h)...........................................................41
Software Reset Register, RES (0Ah)..................................................................42
Performance Monitoring Register, MON (0Bh) ...................................................42
Digital Loopback Register, DL (0Ch)...................................................................42
LOS/AIS Criteria Register, LCS (0Dh) ................................................................42
Automatic TAOS Select Register, ATS (0Eh) .....................................................42
Global Control Register, GCR (0Fh) ...................................................................43
Pulse Shaping Indirect Address Register, PSIAD (10h)......................................43
Pulse Shaping Data Register, PSDAT (11h).......................................................44
Output Enable Register, OER (12h)....................................................................44
AIS Status Monitor Register, AIS (13h)...............................................................44
AIS Interrupt Enable Register, AISIE (14h).........................................................44
AIS Interrupt Status Register, AISIS (15h)..........................................................45
TAP State Description.........................................................................................46
Boundary Scan Register (BSR)...........................................................................49
Analog Port Scan Register (ASR).......................................................................52
Device Identification Register (IDR)....................................................................53
Instruction Register (IR) ......................................................................................54
Absolute Maximum Ratings.................................................................................54
Recommended Operating Conditions.................................................................55
DC Characteristics ..............................................................................................55
E1 Transmit Transmission Characteristics..........................................................56
E1 Receive Transmission Characteristics...........................................................57
T1 Transmit Transmission Characteristics..........................................................58
T1 Receive Transmission Characteristics...........................................................58
Jitter Attenuator Characteristics..........................................................................59
Analog Test Port Characteristics.........................................................................60
Transmit Timing Characteristics..........................................................................60
Receive Timing Characteristics...........................................................................61
相关PDF资料 |
PDF描述 |
|---|---|
| LXT388LE | PCM TRANSCEIVER|DUAL|CEPT PCM-30/E-1|CMOS|QFP|100PIN|PLASTIC |
| LXT400JE | Hermetically Sealed, 3.3V, High Speed, High CMR, Logic Gate Optocoupler |
| LXT6155LE | Telecomm/Datacomm |
| LXT6251A | ATM/SONET MAPPER|CMOS|QFP|208PIN|PLASTIC |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LXT388LE | 制造商:未知厂家 制造商全称:未知厂家 功能描述:PCM TRANSCEIVER|DUAL|CEPT PCM-30/E-1|CMOS|QFP|100PIN|PLASTIC |
| LXT400 | 制造商:LVL1 制造商全称:LVL1 功能描述:All Rate Extended Range Switched 56/DDS Transceiver |
| LXT400JE | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Transceiver Circuit For Telecommunications |
| LXT441 | 制造商:LVL1 制造商全称:LVL1 功能描述:Switched 56/DDS Integrated DSU/CSU |
| LXT6155 | 制造商:INTEL 制造商全称:Intel Corporation 功能描述:155 Mbps SDH/SONET/ATM Transceiver |
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