LXT388LE PDF资料下载(32/80 页)PCM TRANSCEIVER|DUAL|CEPT PCM-30/E-1|CMOS|QFP|100PIN|PLASTIC

您好，
买卖IC网欢迎您。
请登录
免费注册

您现在的位置：买卖IC网 > PDF目录369885 > LXT388LE PCM TRANSCEIVER|DUAL|CEPT PCM-30/E-1|CMOS|QFP|100PIN|PLASTIC PDF资料下载

参数资料

型号：	LXT388LE
英文描述：	PCM TRANSCEIVER\|DUAL\|CEPT PCM-30/E-1\|CMOS\|QFP\|100PIN\|PLASTIC
中文描述：	的PCM收发器\|双\|优税PCM-30/E-1 \|的CMOS \| QFP封装\| 100引脚\|塑料
文件页数：	32/80页
文件大小：	1112K
代理商：	LXT388LE

LXT384

—

Octal T1/E1/J1 Transceiver

Datasheet

2.7.2

Digital Loopback

The digital loopback function is available in software mode only. When selected, the transmit clock

and data inputs (TCLK, TPOS & TNEG) are looped back and output on the RCLK, RPOS &

RNEG pins (see

Figure 9

). The data presented on TCLK, TPOS & TNEG is also output on the

TTIP & TRING pins. Note: signals on the RTIP & RRING pins are ignored during digital

loopback.

2.7.3

Remote Loopback

During remote loopback (see

Figure 10

), the RCLK, RPOS & RNEG outputs routed to the transmit

circuits and output on the TTIP & TRING pins. Note: input signals on the TCLK, TPOS & TNEG

pins are ignored during remote loopback.

Note:

In data recovery mode, the pulse template cannot be guaranteed while in a remote loopback.

2.7.4

Transmit All Ones (TAOS)

In Hardware mode, the TAOS mode is set by pulling TCLK High for more than 16 MCLK cycles.

In software mode, TAOS mode is set by asserting the corresponding bit in the TAOS Register. In

addition, automatic ATS insertion (in case of LOS) may be set using the ATS Register. Note: the

TAOS generator uses MCLK as a timing reference, therefore TAOS doesn

’

t work in data recovery

mode. In order to assure that the output frequency is within specification limits, MCLK must have

the applicable stability. DLOOP does not function when TAOS is active.

Figure 9. Digital Loopback

Timing &

Control

Timing

Recovery

TTIP

TRING

RTIP

RRING

RCLK

RPOS

RNEG

TCLK

TPOS

TNEG

* If Enabled

JA*

Figure 10. Remote Loopback