参数资料
型号: M38039GCHWG
元件分类: 微控制器/微处理器
英文描述: 8-BIT, MROM, 8.4 MHz, MICROCONTROLLER, PBGA64
封装: 6 X 6 MM, 0.65 PITCH, FLGA-64
文件页数: 80/103页
文件大小: 1412K
代理商: M38039GCHWG
REJ03B0166-0113 Rev.1.13
Aug 21, 2009
Page 78 of 100
3803 Group (Spec.H QzROM version)
NOTES
NOTES ON PROGRAMMING
1. Processor Status Register
(1) Initializing of processor status register
Flags which affect program execution must be initialized after a reset.
In particular, it is essential to initialize the T and D flags because
they have an important effect on calculations. Initialize these
flags at beginning of the program.
<Reason>
After a reset, the contents of the processor status register (PS) are
undefined except for the I flag which is “1”.
Fig 73. Initialization of processor status register
(2) How to reference the processor status register
To reference the contents of the processor status register (PS),
execute the PHP instruction once then read the contents of (S+1).
If necessary, execute the PLP instruction to return the PS to its
original status.
Fig 74. Stack memory contents after PHP instruction
execution
2. Decimal calculations
(1) Execution of decimal calculations
The ADC and SBC are the only instructions which will yield
proper decimal notation, set the decimal mode flag (D) to “1”
with the SED instruction. After executing the ADC or SBC
instruction, execute another instruction before executing the
SEC, CLC, or CLD instruction.
Fig 75. Execution of decimal calculations
(2) Notes on status flag in decimal mode
When decimal mode is selected, the values of three of the flags in
the status register (the N, V, and Z flags) are invalid after a ADC
or SBC instruction is executed.
The carry flag (C) is set to “1” if a carry is generated as a result of the
calculation, or is cleared to “0” if a borrow is generated. To
determine whether a calculation has generated a carry, the C flag
must be initialized to “0” before each calculation. To check for a
borrow, the C flag must be initialized to “1” before each calculation.
3. JMP instruction
When using the JMP instruction in indirect addressing mode, do
not specify the last address on a page as an indirect address.
4. Multiplication and Division Instructions
The index X mode (T) and the decimal mode (D) flags do not
affect the MUL and DIV instruction.
The execution of these instructions does not change the
contents of the processor status register.
5. Read-Modify-Write Instruction
Do not execute any read-modify-write instruction to the read
invalid (address) SFR.
The read-modify-write instruction reads 1-byte of data from
memory, modifies the data, and writes 1-byte the data to the
original memory.
In the 740 Family, the read-modify-write instructions are the
following:
(1) Bit handling instructions:
CLB, SEB
(2) Shift and rotate instructions:
ASL, LSR, ROL, ROR, RRF
(3) Add and subtract instructions:
DEC, INC
(4) Logical operation instructions (1’s complement):
COM
Although not the read-modify-write instructions, add and
subtract/logical operation instructions (ADC, SBC, AND, EOR,
and ORA) when T flag = “1” operate in the way as the read-
modify-write instruction. Do not execute them to the read invalid
SFR.
<Reason>
When the read-modify-write instruction is executed to the read
invalid SFR, the following may result:
As reading is invalid, the read value is undefined. The instruction
modifies this undefined value and writes it back, so the written
value will be indeterminate.
Reset
Initializing of flags
Main program
Stored PS
(S)
(S) + 1
Set D flag to “1”
ADC or SBC instruction
NOP instruction
SEC, CLC, or CLD instruction
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