参数资料
型号: M38748EAF-XXXFS
厂商: Mitsubishi Electric Corporation
英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述: 单芯片8位CMOS微机
文件页数: 39/92页
文件大小: 1292K
代理商: M38748EAF-XXXFS
39
3874 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
G
Serial I/O2 Operation
When writing to the serial I/O2 register (001F
16
), the serial I/O2
counter is set to “7”.
After the write is completed, data is output from the S
OUT2
pin
each time the transfer clock goes from “H” to “L”. In addition, each
time the transfer clock goes from “L” to “H”, the contents of the se-
rial I/O2 register are shifted by 1 bit data is simultaneously
received from the S
IN2
pin.
When selecting an internal clock as the transfer clock source, the
serial I/O2 counter goes to “0” by counting the transfer clock 8
times, and the transfer clock stops at “H”, and the interrupt request
bit is set to “1”. In addition, the S
OUT2
pin becomes the high-im-
pedance state after the completion of data transfer. (Bit 7 of the
serial I/O2 control register does not go to “1” and only the S
OUT2
pin becomes the high-impedance state.)
Fig. 33 Serial I/O2 timing (LSB first)
When selecting an external clock as the transfer clock source, the
interrupt request bit is set when counting the transfer clock 8
times. However, the transfer clock does not stop, so that control
the clock externally. The S
OUT2
pin does not become the high-im-
pedance state after completion of data transmit.
In order to set the S
OUT2
pin to the high-impedance state when
selecting an external clock, set “1” to bit 7 of the serial
I/O2 control register after completion of data transmit. Also, make
sure that S
CLK2
is at “H” for this process. When the next data is
transmitted (falling of transfer clock), bit 7 of the serial I/O2 control
register goes to “0” and the S
OUT2
pin goes to an active state.
Interrupt request
bit set
Synchronous clock
Transfer clock
Serial I/O2 register
write signal
Serial I/O2 output
S
OUT2
Serial I/O2 input
S
IN2
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
Note:
When selecting an internal clock after completion of data transmit, the S
OUT2
pin
becomes the high-impedance state.
(Note)
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