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参数资料
型号： M7020R-083ZA1T
厂商： 意法半导体
英文描述： 32K x 68-bit Entry NETWORK SEARCH ENGINE
中文描述： 32K的× 68位进入网络搜索引擎
文件页数： 27/150页
文件大小： 996K
代理商： M7020R-083ZA1T
27/150
M7020R
SEARCH ENGINE ARCHITECTURE
The M7020R consists of 32K x 68-bit storage cells
referred to as data bits. There is a mask cell corre-
sponding to each data cell. Figure 12 shows the
three organizations of the device based on the val-
ue of the CFG bits in the command register.
During a SEARCH operation, the search data bit
(S), data array bit (D), mask array bit (M) and the
global mask bit (G) are used in the following man-
ner to generate a match at that bit position (see
Table 15, page 28).
The entry with all matched bit positions results in a
successful search during a SEARCH operation.
In order for a successful search within a device to
make the device the local winner in the SEARCH
operation, all 68-bit positions must generate a
match for a 68-bit entry in 68-bit-configured quad-
rants, or all 136-bit positions must generate a
match for two consecutive even and odd 68-bit en-
tries in quadrants configured as 136 bits, or all
272-bit positions must generate a match for 4 con-
secutive entries aligned to 4 entry-page bound-
aries of 68-bit entries in quadrants configured as
272 bits.
An arbitration mechanism using a cascade bus de-
termines the global winning device among the lo-
cal winning devices in a SEARCH cycle. The
global winning device drives the SRAM Bus, SSV,
and the SSF signals. In case of a SEARCH failure,
the devices with the LDEV and LRAM bits set
drive(s) the SRAM Bus, SSF, and SSV signals.
The M7020R device can be configured to contain
tables of different widths, even within the same
chip. Figure 13, page 28 shows a sample configu-
ration of different widths.
Data and Mask Addressing
Figure 14, page 28 shows the M7020R data array
and mask array addressing procedure.
Figure 12. M7020R Database Width Configuration
D
Data
Data
M
Masks
Masks
32 K
CFG = 00000000
CFG = 01010101
CFG = 10101010
68
136
272
16 K
8 K
AI04279
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