- 您现在的位置：买卖IC网 > PDF目录359091 > M7020R-083ZA1T (意法半导体) 32K x 68-bit Entry NETWORK SEARCH ENGINE PDF资料下载
参数资料
| 型号： | M7020R-083ZA1T |
| 厂商： | 意法半导体 |
| 英文描述： | 32K x 68-bit Entry NETWORK SEARCH ENGINE |
| 中文描述： | 32K的× 68位进入网络搜索引擎 |
| 文件页数： | 88/150页 |
| 文件大小： | 996K |
| 代理商： | M7020R-083ZA1T |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页当前第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页第114页第115页第116页第117页第118页第119页第120页第121页第122页第123页第124页第125页第126页第127页第128页第129页第130页第131页第132页第133页第134页第135页第136页第137页第138页第139页第140页第141页第142页第143页第144页第145页第146页第147页第148页第149页第150页
M7020R
88/150
Table 39. Latency of SEARCH from Instruction to SRAM Access Cycle, 136-bit, Up to 31 Devices
Table 40. Shift of SSF and SSV from SADR
272-bit SEARCH on Tables Configured as x272 Using a Single M7020R Device
The hardware diagram for this search subsystem
is shown in Figure 63, page 89. Figure 64, page 90
shows the timing diagram for a SEARCH com-
mand in the 272-bit-configured table (CFG =
10101010) consisting of a single device for one set
of parameters: TLSZ = ’00,’ HLAT = ’001,’ LRAM =
’1,’ and LDEV = ’1.’
The following is the sequence of operation for a
single 136-bit SEARCH command (also refer to
COMMAND CODES AND PARAMETERS, page
29).
–
Cycle A:
The host ASIC drives the CMDV high
and applies SEARCH command code ('10') on
CMD[1:0] signals. CMD[5:3] signals must be
driven with the index to the GMR pair used for
bits [271:136] of the data being searched.
DQ[67:0] must be driven with the 68-bit data
([271:204]) to be compared to all locations “0” in
the four 68-bits-word page. The CMD[2] signal
must be driven to logic ’1.’
Note:
CMD[2] = 1 signals that the search is a
x272-bit search. CMD[8:3] in this cycle is ig-
nored.
–
Cycle B:
The host ASIC continues to drive the
CMDV high and continues to apply the com-
mand code of SEARCH command ('10') on
CMD[1:0]. The DQ[67:0] is driven with the 68-bit
data ([204:136]) to be compared to all locations
“1” in the four 68-bits-word page.
–
Cycle C:
The host ASIC drives the CMDV high
and applies SEARCH command code ('10') on
CMD[1:0] signals. CMD[5:3] signals must be
driven with the index to the GMR pair used for
bits [135:0] of the data being searched.
CMD[8:7] signals must be driven with the bits
that will be driven on SADR[21:20] by this de-
vice if it has a hit. DQ[67:0] must be driven with
the 68-bit data ([135:68]) to be compared to all
locations “2” in the four 68-bits-word page. The
CMD[2] signal must be driven to logic '0.'
–
Cycle D:
The host ASIC continues to drive the
CMDV high and applies SEARCH command
code ('10') on CMD[1:0]. CMD[8:6] signals must
be driven with the index of the SSR that will be
used for storing the address of the matching en-
try and the Hit Flag (see SEARCH-Successful
Registers (SSR[0:7]), page 23). The DQ[67:0] is
driven with the 68-bit data ([67:0]) to be com-
pared to all locations “3” in the four 68-bits-word
page. CMD[5:2] is ignored because the LEARN
Instruction is not supported for x272 tables.
Note:
For 272-bit searches, the host ASIC must
supply four distinct 68-bit data words on
DQ[67:0] during Cycles A, B, C, and D. The
GMR Index in Cycle A selects a pair of GMRs
that apply to DQ data in Cycles A and B. The
GMR Index in Cycle C selects a pair of GMRs
that apply to DQ data in Cycles C and D.
# of devices
Max Table Size
Latency in CLK Cycles
1 (TLSZ = 00)
16K x 136-bit
4
2–8 (TLSZ = 01)
128K x 136-bit
5
9–31 (TLSZ = 10)
496K x 136-bit
6
HLAT
Number of CLK Cycles
000
0
001
1
010
2
011
3
100
4
101
5
110
6
111
7
相关PDF资料 |
PDF描述 |
|---|---|
| M7020R | 32K x 68-bit Entry NETWORK SEARCH ENGINE |
| M72DW64000B | 64Mbit (x8/ x16, Multiple Bank, Boot Block) Flash Memory and 16Mbit Pseudo SRAM, 3V Supply, Multiple Memory Product |
| M72DW64000B70ZT | 64Mbit (x8/ x16, Multiple Bank, Boot Block) Flash Memory and 16Mbit Pseudo SRAM, 3V Supply, Multiple Memory Product |
| M72DW64000B90ZT | 64Mbit (x8/ x16, Multiple Bank, Boot Block) Flash Memory and 16Mbit Pseudo SRAM, 3V Supply, Multiple Memory Product |
| M74AC574TTR | OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT NON INVERTING |
相关代理商/技术参数 |
参数描述 |
|---|---|
| M702-230442 | 功能描述:火线接头 IEEE 1394 SMT 4P HORIZONTAL RoHS:否 制造商:Molex 产品:IEEE 1394 Firewire Connectors 标准:IEEE 1394 位置/触点数量:6 节距:2 mm 触点电镀:Unplated 触点材料:Phosphor Bronze 型式:Female 电流额定值:0.5 A 安装风格:Through Hole 端接类型:Solder Tab 连接器类型:Firewire Receptacle |
| M702-230642 | 功能描述:火线接头 IEEE 1394 SMT 6P HORIZONTAL RoHS:否 制造商:Molex 产品:IEEE 1394 Firewire Connectors 标准:IEEE 1394 位置/触点数量:6 节距:2 mm 触点电镀:Unplated 触点材料:Phosphor Bronze 型式:Female 电流额定值:0.5 A 安装风格:Through Hole 端接类型:Solder Tab 连接器类型:Firewire Receptacle |
| M7023 | 制造商:Tamura Corporation of America 功能描述: |
| M7027 | 功能描述:数字万用表 Dual Display Multime 0.3% Accuracy RoHS:否 制造商:Tektronix 产品:Multimeters 类型:Bench 准确性:0.04 % 电压范围:2 V to 2 kV 电阻范围: 电容范围: 显示计数: 频率:10 Hz to 45 Hz, 850 Hz to 1 MHz 测距: 真均方根值: 数据保持: |
| M7029 | 功能描述:数字万用表 Dual Display Multime 0.2% Accuracy RoHS:否 制造商:Tektronix 产品:Multimeters 类型:Bench 准确性:0.04 % 电压范围:2 V to 2 kV 电阻范围: 电容范围: 显示计数: 频率:10 Hz to 45 Hz, 850 Hz to 1 MHz 测距: 真均方根值: 数据保持: |
发布紧急采购，3分钟左右您将得到回复。