参数资料
型号: M7020R-083ZA1T
厂商: 意法半导体
英文描述: 32K x 68-bit Entry NETWORK SEARCH ENGINE
中文描述: 32K的× 68位进入网络搜索引擎
文件页数: 6/150页
文件大小: 996K
代理商: M7020R-083ZA1T
M7020R
6/150
272-bit Search on Tables Configured as x272 Using Up to 31 M7020R Devices. . . . . . . . . . . 99
Hit/Miss Assumption (Table 46.) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
Hardware Diagram for a Table with 31 Devices (Figure 71.) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
Hardware Diagram for a Block of Up to Eight Devices (Figure 72.) . . . . . . . . . . . . . . . . . . . . . . . 102
x272 Table with 31 Devices (Figure 73.). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
Timing Diagrams for x272 Using Up to 31 M7020R Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
Each Device in Block Number 0 (Miss on Each Device) (Figure 74.). . . . . . . . . . . . . . . . . . . 104
Each Device Above the Winning Device in Block Number 1 (Figure 75.). . . . . . . . . . . . . . . . 105
Globally Winning Device in Block Number 1 (Figure 76.) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
Devices Below the Winning Device in Block Number 1 (Figure 77.). . . . . . . . . . . . . . . . . . . . 107
Devices Above the Winning Device in Block Number 2 (Figure 78.) . . . . . . . . . . . . . . . . . . . 108
Globally Winning Device in Block Number 2 (Figure 79.) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Devices Below the Winning Device in Block Number 2 (Figure 80.). . . . . . . . . . . . . . . . . . . . 110
Devices Above the Winning Device in Block Number 3 (Figure 81.) . . . . . . . . . . . . . . . . . . . 111
Globally Winning Device in Block Number 3 (Figure 82.) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
Devices Below the Winning Device in Block Number 3 (not Device 30 - Last Device). . . . . . 113
Last Device in Block Number 3 (Device 30 in the Table) (Figure 84.) . . . . . . . . . . . . . . . . . . 114
Latency of SEARCH from Cycles C and D to SRAM Access Cycle, 272-bit, Up to 31 Devices . . 115
Shift of SSF and SSV from SADR (Table 48.). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
MIXED SEARCHES. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
Tables Configured with Different Widths Using an M7020R . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
Timing Diagram for Mixed SEARCH for One Device (Figure 85.). . . . . . . . . . . . . . . . . . . . . . . . . 116
Multi-Width Configurations Example (Figure 86.) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
LRAM AND LDEV DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .117
LEARN COMMAND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
Timing Diagram of LEARN: TLSZ = 00 (Figure 87.) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
Timing Diagram of LEARN: TLSZ = 01 (Except on the Last Device) (Figure 88.). . . . . . . . . . . . . 120
Timing Diagram of LEARN on Device 7: TLSZ = 01 (Figure 89.) . . . . . . . . . . . . . . . . . . . . . . . . . 121
Latency of SRAM WRITE Cycle from Second Cycle of LEARN Instruction (Table 49.) . . . . . . . . 121
DEPTH-CASCADING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
Depth-Cascading Up to Eight Devices (One Block) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
Depth-Cascading Up to 31 Devices (4 Blocks) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
Depth-Cascading to Generate a “FULL” Signal. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
Depth-Cascading to Form a Single Block (Figure 90.) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
Depth-Cascading Four Blocks (Figure 91.) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
“FULL” Generation in a Cascaded Table (Figure 92.). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
SRAM ADDRESSING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
SRAM PIO Access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
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