参数资料
型号: MAX16067ETJ+T
厂商: Maxim Integrated Products
文件页数: 33/48页
文件大小: 0K
描述: IC SYSTEM MANAGER 6CH 32-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
应用: 电源监控器,序列发生器
电源电压: 2.8 V ~ 14 V
电流 - 电源: 2.8mA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 32-WFQFN 裸露焊盘
供应商设备封装: 32-TQFN-EP(5x5)
包装: 带卷 (TR)
6-Channel, Flash-Configurable System Manager
with Nonvolatile Fault Registers
Table 27. Command Codes
COMMAND CODE
A5h
A6h
A7h
A8h
A9h
AAh
ABh
ACh
ACTION
Block write
Block read
Reboot flash in register file
Trigger emergency save to flash
Flash page access ON
Flash page access OFF
User flash access ON (must be in flash page already)
User flash access OFF (return to flash page)
Restrictions When Writing to Flash
Flash must be written to 8 bytes at a time. The initial
address must be aligned to 8-byte boundaries—the 3
LSBs of the initial address must be ‘000’. Write the 8
bytes using a single block write command or using eight
successive Write Byte commands. A write operation
requires 122ms for each 8-byte block. After program-
ming a block, check r20h[1] (see Table 31) to make sure
the write operation is complete before attempting to write
the next block.
Send Byte
The send byte protocol allows the master device to
send one byte of data to the slave device (see Figure
12). The send byte presets a register pointer address
for a subsequent read or write. The slave sends a NACK
instead of an ACK if the master tries to send a memory
address or command code that is not allowed. If the
master sends A5h or A6h, the data is ACK, because this
could be the start of the write block or read block. If the
master sends a STOP condition before the slave asserts
an ACK, the internal address pointer does not change.
If the master sends A7h, this signifies a software reboot.
The send byte procedure is as follows:
1) The master sends a START condition.
2) The master sends the 7-bit slave address and a write
bit (low).
3) The addressed slave asserts an ACK on SDA.
4) The master sends an 8-bit memory address or com-
mand code.
5) The addressed slave asserts an ACK (or NACK) on
SDA.
6) The master sends a STOP condition.
Receive Byte
The receive byte protocol allows the master device to
read the register content of the MAX16067 (see Figure
12). The flash or register address must be preset with
a send byte or write word protocol first. Once the read
is complete, the internal pointer increases by one.
Repeating the receive byte protocol reads the contents
of the next address. The receive byte procedure follows:
1) The master sends a START condition.
2) The master sends the 7-bit slave address and a read
bit (high).
3) The addressed slave asserts an ACK on SDA.
4) The slave sends 8 data bits.
5) The master asserts a NACK on SDA.
6) The master generates a STOP condition.
Write Byte
The write byte protocol (see Figure 12) allows the mas-
ter device to write a single byte in the default page,
extended page, or flash page, depending on which
page is currently selected. The write byte procedure is
as follows:
1) The master sends a START condition.
2) The master sends the 7-bit slave address and a write
bit (low).
3) The addressed slave asserts an ACK on SDA.
4) The master sends an 8-bit memory address.
5) The addressed slave asserts an ACK on SDA.
6) The master sends an 8-bit data byte.
7) The addressed slave asserts an ACK on SDA.
8) The master sends a STOP condition.
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