参数资料
型号: MAX17019ATM+T
厂商: Maxim Integrated Products
文件页数: 12/25页
文件大小: 0K
描述: IC VOLT CTRL QUAD OUT 48-TQFN-EP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
应用: 嵌入式系统,控制台/机顶盒
电源电压: 5.5 V ~ 38 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 48-WFQFN 裸露焊盘
供应商设备封装: 48-TQFN-EP(6x6)
包装: 带卷 (TR)
High-Input-Voltage Quad-Output Controller
Pin Description
PIN
1
2
3–6
7, 8
9
10
11
12
13
14
NAME
POKC
BSTC
LXC
OUTD
IND
FBD
VTTR
REFIND
SHDN
INLDO
FUNCTION
Open-Drain Power-Good Output for the Internal 5A Step-Down Converter. POKC is low if FBC is more than
12% (typ) above or below the nominal 0.75V feedback regulation threshold. POKC is held low during
startup and in shutdown. POKC becomes high impedance when FBC is in regulation.
Boost Flying Capacitor Connection for the Internal 5A Step-Down Converter. The MAX17019 includes an
internal boost switch/diode connected between V DD and BSTC. Connect to an external capacitor as shown
in Figure 1.
Inductor Connection for the Internal 5A Step-Down Converter. Connect LXC to the switched side of the
inductor.
Source/Sink Linear-Regulator Output. Bypass OUTD with 2x 10μF or greater ceramic capacitors to ground.
Dropout needs additional output capacitance (see the VTT LDO Output Capacitor Selection (C OUTD )
section).
Source/Sink Linear-Regulator Input. Bypass IND with a 10μF or greater ceramic capacitor to ground.
Feedback Input for the Internal Source/Sink Linear Regulator. FBD tracks and regulates to the REFIND
voltage.
Ouput of Reference Buffer. Bypass with 0.22μF for ±3mA of output current.
Dynamic Reference Input Voltage for the Source/Sink Linear Regulator and the Reference Buffer. The
linear-regulator feedback threshold (FBD) tracks the REFIND voltage.
Shutdown Control Input. The device enters its 5μA supply current shutdown mode if V SHDN is less than
the SHDN input falling-edge trip level and does not restart until V SHDN is greater than the SHDN input
rising-edge trip level. Connect SHDN to V INLDO for automatic startup of LDO5.
Input of the Startup Circuitry and the LDO5 Internal 5V Linear Regulator. Bypass to GND with a 0.1 μF or
greater ceramic capacitor close to the controller.
In the single-cell step-up applications, the 5V linear regulator is no longer necessary for the 5V bias supply.
Connect BYP and INLDO to the system’s 5V supply to effectively disable the linear regulator.
5V Internal Linear-Regulator Output. Bypass with 4.7μF or greater ceramic capacitor. The 5V linear
regulator provides the bias power for the gate drivers (V DD ) and analog control circuitry (V CC ). The linear
regulator sources up to 50mA (max guaranteed). When BYP exceeds 4.65V (typ), the MAX17019 bypasses
15
LDO5
the linear regulator through a 1.5
loads up to 100mA.
bypass switch. When the linear regulator is bypassed, LDO5 supports
In the single-cell step-up applications, the 5V linear regulator is no longer necessary for the 5V bias supply.
Bypass SHDN to ground and leave LDO5 unconnected. Connect BYP and INLDO to effectively disable the
linear regulator.
Linear-Regulator Bypass Input. When BYP exceeds 4.65V, the controller shorts LDO5 to BYP through a
1.5
bypass switch and disables the linear regulator. When BYP is low, the linear regulator remains active.
The BYP input also serves as the VTTR buffer supply, allowing VTTR to remain active even when the
16
BYP
source/sink linear regulator (OUTD) has been disabled under system standby/suspend conditions.
In the single-cell step-up applications, the 5V linear regulator is no longer necessary for the 5V bias supply.
Bypass LDO5 to ground with a 1μF capacitor and leave this output unconnected. Connect BYP and INLDO
to the system’s 5V supply to effectively disable the linear regulator.
12
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