参数资料
型号: MAX17019ATM+T
厂商: Maxim Integrated Products
文件页数: 21/25页
文件大小: 0K
描述: IC VOLT CTRL QUAD OUT 48-TQFN-EP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
应用: 嵌入式系统,控制台/机顶盒
电源电压: 5.5 V ~ 38 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 48-WFQFN 裸露焊盘
供应商设备封装: 48-TQFN-EP(6x6)
包装: 带卷 (TR)
High-Input-Voltage Quad-Output Controller
C OUT > ?
? ? ? 1 + V
V OUT ( V IN OUT )
Δ I INDUCTOR =
V IN SW L
inductor  manufacturers  provide  inductors  in  standard
values, such as 1.0μH, 1.5μH, 2.2μH, 3.3μH, etc. Also
look for nonstandard values, which can provide a better
compromise in LIR across the input voltage range. If
using a swinging inductor (where the no-load induc-
tance decreases linearly with increasing current), evalu-
ate the LIR with properly scaled inductance values. For
the selected inductance value, the actual peak-to-peak
inductor ripple current ( Δ I INDUCTOR ) is defined by:
- V
f
Ferrite cores are often the best choice, although soft sat-
urating molded core inductors are inexpensive and can
? 1 ? ? V REF ? ? V OUT ?
? ? ?
? 2 f SW R DROOP ? ? V OUT ? I N ?
where R DROOP is 2R SENSE for regulator A, 5mV/A for
regulator B, or 7mV/A for regulator C as defined in the
Electrical Characteristics table, and f SW is the switching
frequency selected by the FREQ setting (see Table 1).
Additionally, an additional feedback pole—capacitor
from FB to analog ground (C FB )—might be necessary to
cancel the unwanted ESR zero of the output capacitor.
In general, if the ESR zero occurs before the Nyquist
pole, then canceling the ESR zero is recommended:
If:
I PEAK = I LOAD ( MAX ) + ?
ESR > ?
work well at 500kHz. The core must be large enough not
to saturate at the peak inductor current (I PEAK ):
? Δ I INDUCTOR ?
?
? 2 ?
Then:
? 1 + D ?
?
? 4 π f SW C OUT ?
C FB > ? OUT
SMPS Output Capacitor Selection
The output filter capacitor selection requires careful
evaluation of several different design requirements—
stability, transient response, and output ripple volt-
age—that place limits on the output capacitance and
ESR. Based on these requirements, the typical applica-
tion requires a low-ESR polymer capacitor (lower cost
but higher output-ripple voltage) or bulk ceramic
capacitors (higher cost but low output-ripple voltage).
SMPS Loop Compensation
Voltage positioning dynamically lowers the output volt-
age in response to the load current, reducing the loop
gain. This reduces the output capacitance requirement
? C   ESR ?
?
? R FB ?
where R FB is the parallel impedance of the FB resistive
divider.
SMPS Output Ripple Voltage
With polymer capacitors, the effective series resistance
(ESR) dominates and determines the output ripple volt-
age. The step-down regulator’s output ripple voltage
(V RIPPLE ) equals the total inductor ripple current
( Δ I INDUCTOR ) multiplied by the output capacitor’s ESR.
Therefore, the maximum ESR to meet the output ripple
voltage requirement is:
? ? (
V IN OUT ) V OUT ? ? RIPPLE
? V
(stability  and  transient)  and  output  power  dissipation
requirements as well. The load-line is generated by sens-
ing the inductor current through the high-side MOSFET
on-resistance, and is internally preset to -5mV/A (typ) for
?
R ESR ≤ ?
- V
V IN f SW L ?
regulator B and -7mV/A (typ) for regulator C. The load-
line ensures that the output voltage remains within the
regulation window over the full-load conditions.
The load line of the internal SMPS regulators also pro-
vides the AC ripple voltage required for stability. To
maintain stability, the output capacitive ripple must be
kept smaller than the internal AC ripple voltage, and
crossover must occur before the Nyquist pole—(1 +
duty)/(2f SW ) —occurs. Based on these loop require-
ments, a minimum output capacitance can be deter-
mined from the following:
where f SW is the switching frequency. The actual capa-
citance value required relates to the physical case size
needed to achieve the ESR requirement, as well as to
the capacitor chemistry. Thus, polymer capacitor selec-
tion is usually limited by ESR and voltage rating rather
than by capacitance value. Alternatively, combining
ceramics (for the low ESR) and polymers (for the bulk
capacitance) helps balance the output capacitance vs.
output ripple-voltage requirements.
______________________________________________________________________________________
21
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