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参数资料
| 型号： | MAX17019ATM+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 19/25页 |
| 文件大小： | 0K |
| 描述： | IC VOLT CTRL QUAD OUT 48-TQFN-EP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 应用： | 嵌入式系统，控制台/机顶盒 |
| 电源电压： | 5.5 V ~ 38 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-WFQFN 裸露焊盘 |
| 供应商设备封装： | 48-TQFN-EP（6x6） |
| 包装： | 带卷 (TR) |
High-Input-Voltage Quad-Output Controller
SMPS POR, UVLO, and Soft-Start
Power-on reset (POR) occurs when V CC rises above
approximately 1.9V, resetting the undervoltage, overvolt-
age, and thermal-shutdown fault latches. The POR cir-
cuit also ensures that the low-side drivers are pulled low
until the SMPS controllers are activated. The V CC input
undervoltage lockout (UVLO) circuitry prevents the
switching regulators from operating if the 5V bias supply
(V CC and V DD ) is below its 4.2V UVLO threshold.
Regulator A Startup
Once the 5V bias supply rises above this input UVLO
threshold and ONA is pulled high, the main step-down
controller (regulator A) is enabled and begins switch-
ing. The internal voltage soft-start gradually increments
the feedback voltage by 10mV every 12 switching
cycles. Therefore, OUTA reaches its nominal regulation
voltage 1200/f SWA after regulator A is enabled (see the
REG A Startup Waveform (Heavy Load) graph in the
Typical Operating Characteristics).
Regulator B and C Startup
The internal step-down controllers start switching and
the output voltages ramp up using soft-start. If the bias
supply voltage drops below the UVLO threshold, the
controller stops switching and disables the drivers (LX_
becomes high impedance) until the bias supply voltage
recovers.
Once the 5V bias supply and INBC rise above their
respective input UVLO thresholds ( SHDN must be
pulled high to enable the reference), and ONB or ONC
is pulled high, the respective internal step-down con-
troller (regulator B or C) becomes enabled and begins
switching. The internal voltage soft-start gradually
increments the feedback voltage by 10mV every 24
switching cycles for regulator B or every 12 switching
cycles for regulator C. Therefore, OUTB reaches its
nominal regulation voltage 1800/f SWB after regulator B
is enabled, and OUTC reaches its nominal regulation
voltage 900/f SWC after regulator C is enabled (see the
REG B Startup Waveform (Heavy Load) and REG C
Startup Waveform (Heavy Load) graphs in the Typical
Operating Characteristics).
SMPS Power-Good Outputs (POK)
POKA, POKB, and POKC are the open-drain outputs of
window comparators that continuously monitor each
output for undervoltage and overvoltage conditions.
POK_ is actively held low in shutdown ( SHDN = GND),
standby (ONA = ONB = ONC = GND), and soft-start.
Once the soft-start sequence terminates, POK_
becomes high impedance as long as the output remains
within ±8% (min) of the nominal regulation voltage set
by FB_. POK_ goes low once its corresponding output
drops 12% (typ) below its nominal regulation point, an
output overvoltage fault occurs, or the output is shut
down. For a logic-level POK_ output voltage, connect an
external pullup resistor between POK_ and LDO5. A
100k Ω pullup resistor works well in most applications.
SMPS Fault Protection
Output Overvoltage Protection (OVP)
If the output voltage rises above 112% (typ) of its nomi-
nal regulation voltage, the controller sets the fault latch,
pulls POK_ low, shuts down the respective regulator,
and immediately pulls the output to ground through its
low-side MOSFET. Turning on the low-side MOSFET
with 100% duty cycle rapidly discharges the output
capacitors and clamps the output to ground. However,
this commonly undamped response causes negative
output voltages due to the energy stored in the output
LC at the instant the OVP occurs. If the load cannot tol-
erate a negative voltage, place a power Schottky diode
across the output to act as a reverse-polarity clamp. If
the condition that caused the overvoltage persists
(such as a shorted high-side MOSFET), the input
source also fails (short-circuit fault). Cycle V CC below
1V or toggle the respective enable input to clear the
fault latch and restart the regulator.
Output Undervoltage Protection (UVP)
Each MAX17019 includes an output UVP circuit that
begins to monitor the output once the startup blanking
period has ended. If any output voltage drops below
88% (typ) of its nominal regulation voltage, the UVP
protection immediately sets the fault latch, pulls the
respective POK output low, forces the high-side and
low-side MOSFETs into high-impedance states (DH =
DL = low), and shuts down the respective regulator.
Cycle V CC below 1V or toggle the respective enable
input to clear the fault latch and restart the regulator.
Thermal-Fault Protection
The MAX17019 features a thermal fault-protection cir-
cuit. When the junction temperature rises above
+160°C, a thermal sensor activates the fault latch, pulls
all POK outputs low, and shuts down all regulators.
Toggle SHDN to clear the fault latch and restart the
controllers after the junction temperature cools by 15°C.
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