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参数资料
| 型号： | MAX17019ATM+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 23/25页 |
| 文件大小： | 0K |
| 描述： | IC VOLT CTRL QUAD OUT 48-TQFN-EP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 应用： | 嵌入式系统，控制台/机顶盒 |
| 电源电压： | 5.5 V ~ 38 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-WFQFN 裸露焊盘 |
| 供应商设备封装： | 48-TQFN-EP（6x6） |
| 包装： | 带卷 (TR) |
High-Input-Voltage Quad-Output Controller
PD ( N L Re sistive ) = ? 1 ? ?
? ? ( I LOAD ) R DS ( ON )
? ? V ? ?
OUT
PD ( N H Re sistive ) = ? OUT ? ( I LOAD ) R DS ( O N )
I LOAD = I LIMIT - ?
? I LOAD Q G ( SW ) C OSS V IN ( M A X ) ?
? V IN ( MAX ) f SW
?
and is reasonably priced. Ensure that the MAX17019
DLA gate driver can supply sufficient current to support
the gate charge and the current injected into the para-
sitic drain-to-gate capacitor caused by the high-side
MOSFET turning on; otherwise, cross-conduction prob-
lems might occur. Switching losses are not an issue for
the low-side MOSFET since it is a zero-voltage
switched device when used in the step-down topology.
Power-MOSFET Dissipation
Worst-case conduction losses occur at the duty factor
extremes. For the high-side MOSFET (N H ), the worst-
case power dissipation due to resistance occurs at
minimum input voltage:
? V ? 2
? V IN ?
Generally, use a small high-side MOSFET to reduce
switching losses at high input voltages. However, the
R DS(ON) required to stay within package power-dissi-
pation limits often limits how small the MOSFET can be.
The optimum occurs when the switching losses equal
the conduction (R DS(ON) ) losses. High-side switching
losses do not become an issue until the input is greater
than approximately 15V.
Calculating the power dissipation in high-side
MOSFETs (N H ) due to switching losses is difficult, since
it must allow for difficult-to-quantify factors that influence
the turn-on and turn-off times. These factors include the
internal gate resistance, gate charge, threshold voltage,
source inductance, and PCB layout characteristics. The
following switching loss calculation provides only a very
rough estimate and is no substitute for breadboard
evaluation, preferably including verification using a ther-
mocouple mounted on N H :
PD ( N H Switching ) =
+
? I GATE 2 ?
where C OSS is the output capacitance of N H , Q G(SW) is
the charge needed to turn on the N H MOSFET, and
I GATE is the peak gate-drive source/sink current (1A typ).
Switching losses in the high-side MOSFET can become
a heat problem when maximum AC adapter voltages
are applied, due to the squared term in the switching-
loss equation (C x V IN 2 x f SW ). If the high-side MOSFET
chosen for adequate R DS(ON) at low battery voltages
becomes extraordinarily hot when subjected to
V IN(MAX) , consider choosing another MOSFET with
lower parasitic capacitance.
For the low-side MOSFET (N L ) the worst-case power
dissipation always occurs at maximum battery voltage:
2
? ?
? ? V IN ( MAX ) ? ?
The absolute worst case for MOSFET power dissipation
occurs under heavy overload conditions that are
greater than I LOAD(MAX) , but are not high enough to
exceed the current limit and cause the fault latch to trip.
To protect against this possibility, “overdesign” the cir-
cuit to tolerate:
? Δ I INDUCTOR ?
?
? 2 ?
where I LIMIT is the peak current allowed by the current-
limit circuit, including threshold tolerance and sense-
resistance variation. The MOSFETs must have a
relatively large heatsink to handle the overload power
dissipation.
Choose a Schottky diode (D L ) with a forward voltage
drop low enough to prevent the low-side MOSFET’s
body diode from turning on during the dead time. As a
general rule, select a diode with a DC current rating
equal to 1/3 the load current. This diode is optional and
can be removed if efficiency is not critical.
VTT LDO Design Procedure
IND Input Capacitor Selection (C IND )
The value of the IND bypass capacitor is chosen to limit
the amount of ripple and noise at IND, and the amount of
voltage sag during a load transient. Typically, IND con-
nects to the output of a step-down switching regulator,
which already has a large bulk output capacitor.
Nevertheless, a ceramic capacitor equivalent to half the
VTT output capacitance should be added and placed as
close as possible to IND. The necessary capacitance
value must be increased with larger load current, or if the
trace from IND to the power source is long and results in
relatively high input impedance.
VTT LDO Output Voltage (FBD)
The VTT output stage is powered from the IND input.
The VTT output voltage is set by the REFIND input.
REFIND sets the VTT LDO feedback regulation voltage
(V FBD = V REFIND ) and the VTTR output voltage. The
VTT LDO (FBD voltage) and VTTR track the REFIND
voltage over a 0.5V to 1.5V range. This reference input
feature makes the MAX17019 ideal for memory applica-
tions in which the termination supply must track the
supply voltage.
______________________________________________________________________________________
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX17019EVKIT+ | 功能描述:电源管理IC开发工具 Maxim Evaluation Kit RoHS:否 制造商:Maxim Integrated 产品:Evaluation Kits 类型:Battery Management 工具用于评估:MAX17710GB 输入电压: 输出电压:1.8 V |
| MAX17019NEVKIT+ | 功能描述:电源管理IC开发工具 Maxim Evaluation Kit RoHS:否 制造商:Maxim Integrated 产品:Evaluation Kits 类型:Battery Management 工具用于评估:MAX17710GB 输入电压: 输出电压:1.8 V |
| MAX1701EEE | 功能描述:直流/直流开关转换器 1-3 Cell 1A Step-Up DC/DC Converters RoHS:否 制造商:STMicroelectronics 最大输入电压:4.5 V 开关频率:1.5 MHz 输出电压:4.6 V 输出电流:250 mA 输出端数量:2 最大工作温度:+ 85 C 安装风格:SMD/SMT |
| MAX1701EEE+ | 功能描述:直流/直流开关转换器 1-3 Cell 1A Step-Up DC/DC Converters RoHS:否 制造商:STMicroelectronics 最大输入电压:4.5 V 开关频率:1.5 MHz 输出电压:4.6 V 输出电流:250 mA 输出端数量:2 最大工作温度:+ 85 C 安装风格:SMD/SMT |
| MAX1701EEE+T | 功能描述:直流/直流开关转换器 1-3 Cell 1A Step-Up DC/DC Converters RoHS:否 制造商:STMicroelectronics 最大输入电压:4.5 V 开关频率:1.5 MHz 输出电压:4.6 V 输出电流:250 mA 输出端数量:2 最大工作温度:+ 85 C 安装风格:SMD/SMT |
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