参数资料
型号: MAX17100ETM+T
厂商: Maxim Integrated Products
文件页数: 22/35页
文件大小: 0K
描述: IC REG BOOST INT-SWITCH 48-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
应用: LCD 电视机/监控器
电源电压: 2.5 V ~ 6 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-WFQFN 裸露焊盘
供应商设备封装: 48-TQFN-EP(6x6)
包装: 带卷 (TR)
Internal-Switch Boost Regulator with Integrated Scan
Driver, VCOM Calibrator, and Op Amp for TFT LCDs
Power-Up Sequence and Soft-Start
Once IN exceeds approximately 2.25V, the reference
turns on. And then GATE is pulled high. When the refer-
ence voltage exceeds 1.0V (typ), GATE is pulled low to
turn on the external p-channel MOSFET if no output
fault is detected. Then the IC enables the main step-up
regulator, the gate-on linear-regulator controller, and
the gate-off linear-regulator controller simultaneously.
The IC employs soft-start for each regulator to minimize
inrush current and voltage overshoot and to ensure a
well-defined startup behavior. Each output uses a 7-bit
soft-start DAC. For the step-up and the gate-on linear
regulator, the DAC output is stepped in 128 steps from
zero up to the reference voltage. For the gate-off linear
regulator, the DAC output steps from the reference
down to 250mV in 128 steps. The soft-start duration is
14ms (typ) for all three regulators.
A capacitor (CTGS) from TGS to AGND determines two
switch-control blocks’ startup delay. After the soft-start
routine for each regulator is complete without any fault, a
5μA current source starts charging CTGS. Once the
capacitor voltage exceeds 1.25V (typ), both the switch-
control blocks are enabled as shown in Figure 7. After the
switch-control blocks are enabled, GHC_ can be con-
nected to GHON or GHD_ through the internal p-channel
switches, depending upon the state of YV1C_. Before
startup and when IN is less than UVLO, TGS is internally
connected to AGND to discharge CTGS. Select CTGS to
set the delay time using the following equation:
Switch-Control Block
The switch-control inputs (YV1C1 and YV1C2) are not
activated until all four of the following conditions are
satisfied: the input voltage exceeds UVLO, the soft-start
routine of all the regulators is complete, a no fault con-
dition is detected, and VTGS exceeds its turn-on
threshold. Once activated and if YV1C_ is high, the 6 ?
(typ) internal p-channel switch between GHON and
GHC_ turns on and the 30 ? (typ) p-channel switch
between GHD_ and GHC_ turns off. If YV1C_ is low, the
6 ? (typ) internal p-channel switch between GHON and
GHC_ turns off and the 30 ? (typ) p-channel switch
between GHD_ and GHC_ turns on.
Reset Function
The MAX17100 provides a RST signal to the system for
reset purpose and at the same time the signal is used
internally to control the timing when IC starts to down-
load data from nonvolatile setting memory to the VCOM
calibrator. Below is the sequence description for reset
function:
a) When V IN is less than 1.0V, RST is of undefined
state.
b) RST will be pulled low once V IN exceeds 1.0V.
c) Once V IN exceeds V UVLO , V REF will start up. When
V REF is higher than 1.0V, RST will be released and
its output becomes high impedance. External RC
(Figure 8) will be charged up by their pullup voltage.
d) When RST reaches the threshold voltage (1.25V) dur-
C TGS = DELAY _ TIME ×
5 μA
1 . 25 V
ing charging up, the serial controller will start to down-
load data from the nonvolatile memory to the VCOM
calibrator’s internal register. At this time, the system
device’s like timing controller will also be reset.
The sequence is shown in Figure 9.
IC
INTERNAL
RESET
INSIDE
V IN
V REF
1.0V 2.25V
1.0V
RST
V REFRDY
UNDEFINED
1.25V
RST
REFRDY
Figure 8. Reset Functional Diagram
INTERNAL
RESET
Figure 9. Reset Function Sequence
22
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