参数资料
型号: MAX17100ETM+T
厂商: Maxim Integrated Products
文件页数: 30/35页
文件大小: 0K
描述: IC REG BOOST INT-SWITCH 48-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
应用: LCD 电视机/监控器
电源电压: 2.5 V ~ 6 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-WFQFN 裸露焊盘
供应商设备封装: 48-TQFN-EP(6x6)
包装: 带卷 (TR)
Internal-Switch Boost Regulator with Integrated Scan
Driver, VCOM Calibrator, and Op Amp for TFT LCDs
VCOM Calibrator Interface
The MAX17100 is a slave-only device with a serial
address of 9Eh. The 2-wire serial interface (pins SCL
and SDA) is designed to attach to a 1.8V to 4V serial
bus. Connect both SCL and SDA lines to the V IN supply
through individual pullup resistors. Calculate the
required value of the pullup resistors using:
STOP Condition (P)
A LOW to HIGH transition of the SDA line while the
clock (SCL) is HIGH determines a STOP condition. All
operations must be ended with a STOP condition from
the master device.
DATA Valid
The state of the data line represents valid data when,
R PULLUP ≤
t R
C BUS
after a START condition, the data line is stable for the
duration of the HIGH period of the clock signal. The
data on the line must be changed during the LOW peri-
where t R is the rise time in the Electrical Characteristics
and C BUS is the total capacitance on the bus.
The MAX17100 uses a nonstandard serial interface pro-
tocol with mostly standard voltage and timing parame-
ters, as defined in the following subsections.
BUS Free
Both data and clock lines remain HIGH. Data transfers
can be initiated only when the bus is not busy (Figure 13).
START Condition (S)
Starting from an idle bus state (both SDA and SCL are
high), a HIGH to LOW transition of the SDA line while
the clock (SCL) is HIGH determines a START condition.
All commands must be preceded by a START condition
from a master device on the bus.
SDA
SCL
od of the clock signal. The master generates one clock
pulse per bit of data during write operations and the
slave device outputs 1 data bit per clock pulse during
read operations. Each data transfer is initiated with a
START condition and terminated with a STOP condition.
Two bytes are transferred between the START and
STOP conditions.
Slave Address
After generating a START condition, the bus master
transmits the slave address consisting of the 7-bit
device code (b1001111 or 9Eh) for the MAX17100
(Figure 14). For a read operation, the 8th bit is 1 and for
write operations it is 0. The MAX17100 continuously
monitors the bus for its corresponding slave address. It
generates an acknowledge bit if it recognizes its slave
address and it is not busy programming the MTP.
S
START
CONDITION
DATA LINE
STABLE
DATA VALID
CHANGE
OF DATA
ALLOWED
P
STOP
CONDITION
Figure 13. Serial Bus START, STOP, and Data Change Conditions
S
T
A
R
T
SLAVE ADDRESS
1001111
W
A
C
K
D6
D5
D4
DATA BYTE
D3 D2
D1
D0
P
R
O
G
A
C
K
S
T
O
P
READ BYTE: W = 0, MAX17100 OUTPUTS D6–D0 FOLLOWED BY PROG = 0
WRITE BYTE: W = 1, DATA = D6–D0, PROG = 1
PROGRAM MTP: W = 1, D6–D0 = DON'T CARE, PROG = 0
Figure 14. Serial Slave Address and Data Byte
30
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