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参数资料
| 型号： | MAX17100ETM+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 31/35页 |
| 文件大小： | 0K |
| 描述： | IC REG BOOST INT-SWITCH 48-TQFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 应用： | LCD 电视机/监控器 |
| 电源电压： | 2.5 V ~ 6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-WFQFN 裸露焊盘 |
| 供应商设备封装： | 48-TQFN-EP（6x6） |
| 包装： | 带卷 (TR) |
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Internal-Switch Boost Regulator with Integrated Scan
Driver, VCOM Calibrator, and Op Amp for TFT LCDs
Data Byte
The data byte follows successful transmission of the
MAX17100 ’s slave address (Figure 14). For a read
operation, the MAX17100 will output the 7 bits corre-
sponding to the current DAC setting followed by a 0 bit.
For a write operation, the bus master must provide the
7-bit data corresponding to the desired DAC setting fol-
lowed by a 1 bit. To program the IC’s MTP, the master
must make the last bit a zero, in which case the other 7
bits of data are ignored. For programming, SUP must
exceed its programming threshold (8V min). Otherwise,
programming will not occur and the MAX17100 will not
acknowledge the programming command.
DAC Values
Table 3 lists the DAC values and the corresponding
I RSET , V RSET and V VCOM values.
Table 3. DAC Settings
Acknowledge/Polling
The MAX17100, when addressed, generates an acknowl-
edge pulse after the reception of each byte (Figure 15).
The master device must generate an extra clock pulse
which is associated with this acknowledge bit. The device
that acknowledges has to pull down the SDA line during
the acknowledge clock pulse so that the SDA line is sta-
ble LOW during the HIGH period of the acknowledge-
related clock pulse. Of course, setup and hold times must
be taken into account. The master signals an end of data
to the slave by not generating an acknowledge bit on the
last byte that has been clocked out of the slave. In this
case, the slave leaves the data line HIGH to enable the
master to generate the STOP condition.
The MAX17100 does not generate an acknowledge
while an internal programming cycle is in progress.
Once the internally timed write cycle has started and
the MTP inputs are disabled, acknowledge polling can
be initiated. This involves sending a START condition
7-BIT DATA
BYTE
0000000
0000001
.
.
.
1111110
1111111
I RSET
I RSET(MIN)
I RSET(MIN) + 1
LSB
.
.
.
I RSET(MAX) - 1
LSB
I RSET(MAX)
V RSET (V)
V RSET(MIN)
V RSET(MIN) +
1 LSB
.
.
.
V RSET(MAX) -
1 LSB
V RSET(MAX)
V VCOM (V)
V MAX
V MAX - 1 LSB
.
.
.
V MIN + 1 LSB
V MIN
followed by the device address byte. Only if the internal
write cycle has completed does the MAX17100
respond with an acknowledge pulse, allowing the read
or write sequence to continue.
The MAX17100 does not acknowledge a command to
program the MTP if SUP is not high enough to properly
program the device. Also, a program command must
be preceded by a write command. The IC does not
acknowledge a program command or program the MTP
unless the DAC data has been modified since the most
recent program command.
DATA OUTPUT
BY MASTER
D7
D6
D0
NOT ACKNOWLEDGE
DATA OUTPUT
BY MAX17100
ACKNOWLEDGE
SCL FROM
MASTER
1
2
8
9
S
CLK1
CLK2
CLK8
CLK9
START
CONDITION
ACKNOWLEDGE
CLOCK PULSE
Figure 15. Serial Bus Acknowledge
______________________________________________________________________________________
31
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| MAX17100EVKIT+ | 功能描述:电源管理IC开发工具 MAX17100 Eval Kit RoHS:否 制造商:Maxim Integrated 产品:Evaluation Kits 类型:Battery Management 工具用于评估:MAX17710GB 输入电压: 输出电压:1.8 V |
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| MAX17101ETJ+ | 功能描述:DC/DC 开关控制器 Dual PWM Step-Down Controller RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| MAX17101ETJ+T | 功能描述:DC/DC 开关控制器 Dual PWM Step-Down Controller RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
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