参数资料
型号: MAX17100ETM+T
厂商: Maxim Integrated Products
文件页数: 32/35页
文件大小: 0K
描述: IC REG BOOST INT-SWITCH 48-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
应用: LCD 电视机/监控器
电源电压: 2.5 V ~ 6 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-WFQFN 裸露焊盘
供应商设备封装: 48-TQFN-EP(6x6)
包装: 带卷 (TR)
Internal-Switch Boost Regulator with Integrated Scan
Driver, VCOM Calibrator, and Op Amp for TFT LCDs
PCB Layout and Grounding
Careful PCB layout is important for proper operation.
Use the following guidelines for good PCB layout:
? Minimize the area of high-current loops by placing
the inductor, the output diode, and the output capaci-
tors near the input capacitors and near the LX and
PGND pins. The high-current input loop goes from
the positive terminal of the input capacitor to the
inductor, to the IC’s LX pin, out of PGND, and to the
input capacitor’s negative terminal. The high-current
output loop is from the positive terminal of the input
capacitor to the inductor, to the output diode (D1),
and to the positive terminal of the output capacitors,
reconnecting between the output capacitor and input
capacitor ground terminals. Connect these loop com-
ponents with short, wide connections. Avoid using
vias in the high-current paths. If vias are unavoidable,
use many vias in parallel to reduce resistance and
inductance. Create a power-ground island (PGND)
consisting of the input and output capacitor grounds,
PGND pin, and any charge-pump components.
Connect all of these together with short, wide traces
or a small ground plane. Maximizing the width of the
power ground traces improves efficiency and
reduces output voltage ripple and noise spikes.
Create an analog ground plane (AGND) consisting of
the AGND pin, all the feedback-divider ground con-
nections, the operational-amplifier divider ground
connections, the COMP and TGS capacitor ground
connections, and the device ’s exposed backside
pad. Connect the AGND and PGND islands by con-
necting the PGND pin directly to the exposed back-
side pad. Make no other connections between these
separate ground planes.
? Place all feedback voltage-divider resistors within
5mm of their respective feedback pins. The divider’s
center trace should be kept short. Placing the resis-
tors far away causes their FB traces to become
antennas that can pick up switching noise. Take care
to avoid running any feedback trace near LX or the
switching nodes in the charge pumps, or provide a
ground shield.
? Place the IN pin and REF pin bypass capacitors as
close to the device as possible. The ground connec-
tion of the IN bypass capacitor should be connected
directly to the AGND pin with a wide trace.
? Minimize the length and maximize the width of the
traces between the output capacitors and the load for
best transient responses.
? Minimize the size of the LX node while keeping it
wide and short. Keep the LX node away from feed-
back nodes (FB, FBP, and FBN) and analog ground.
Use DC traces to shield if necessary.
Refer to the MAX17100 Evaluation Kit for an example of
proper PCB layout.
32
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