参数资料
型号: MAX17409GTI+T
厂商: Maxim Integrated Products
文件页数: 3/32页
文件大小: 0K
描述: IC CTRLR NVIDIA CPU 28-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
系列: Quick-PWM™
应用: 处理器
电流 - 电源: 1.5mA
电源电压: 4.5 V ~ 5.5 V
工作温度: -40°C ~ 105°C
安装类型: 表面贴装
封装/外壳: 28-WFQFN 裸露焊盘
供应商设备封装: 28-TQFN-EP(4x4)
包装: 带卷 (TR)
1-Phase Quick-PWM GPU Controller
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, V IN = 12V, V DD = V CC = 5V, SHDN = ILIM = V CC , SKIP = GNDS = PGND = GND, V FB = V CSP = V CSN = 1.05V;
G5–G0 set for 1.05V (G0–G5 = 100110); T A = 0 ° C to +85 ° C , unless otherwise specified. Typical values are at T A = +25°C.) (Note 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
BIAS CURRENTS
Quiescent Supply Current (V CC )
Quiescent Supply Current (V DD )
Shutdown Supply Current (V CC )
Shutdown Supply Current (V DD )
I CC
I DD
Measured at V CC , SKIP = 5V, FB forced
above the regulation point
Measured at V DD , SKIP = 0V, FB forced
above the regulation point, T A = +25°C
Measured at V CC , SHDN = GND, T A = +25°C
Measured at V DD , SHDN = GND, T A = +25°C
1.5
0.02
0.01
0.01
3
1
1
1
mA
μA
μA
μA
FAULT PROTECTION
Skip mode after output reaches the
Output Overvoltage Protection
Threshold
V OVP
regulation voltage or PWM mode;
measured at FB with respect to unloaded
output voltage
Soft-start, soft-shutdown, skip mode, and
output have not reached the regulation
voltage; measured at FB
250
1.45
300
1.50
350
1.55
mV
V
Minimum OVP threshold; measured at FB
0.8
Output Overvoltage Propagation
Delay
t OVP
FB forced 25mV above trip threshold
10
μs
Output Undervoltage Protection
Threshold
Output Undervoltage
Propagation Delay
PWRGD Startup Delay
V UVP
t UVP
Measured at FB with respect to unloaded
output voltage
FB forced 25mV below trip threshold
Measured at startup from the time when
SHDN goes high
Measured at FB
Lower threshold, falling
with respect to
edge (undervoltage)
-450
3
-350
-400
10
5
-300
-350
8
-250
mV
μs
ms
PWRGD Threshold
unloaded output
mV
voltage, 15mV
hysteresis (typ)
Upper threshold, rising
edge (overvoltage)
+150
+200
+250
PWRGD Transition Blanking
Time
PWRGD Delay
PWRGD Output Low Voltage
PWRGD Leakage Current
t BLANK
Measured from the time when FB reaches
the target voltage (Note 4) based on the
slew rate
FB forced 25mV outside the PWRGD trip
thresholds
I SINK = 3mA
High state, PWRGD forced to 5V
20
10
0.4
1
μs
μs
V
μA
V CC Undervoltage-Lockout
Threshold
V UVLO(VCC)
Rising edge, 50mV typical hysteresis,
controller disabled below this level
4.05
4.25
4.48
V
CSN Discharge Resistance
in UVLO
V CC = V DD = 4.0V
8
_______________________________________________________________________________________
3
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