参数资料
型号: MAX8792ETD+T
厂商: Maxim Integrated Products
文件页数: 16/28页
文件大小: 0K
描述: IC PWM CTRLR STEP-DWN 14TDFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
应用: PWM 控制器
输入电压: 2 V ~ 26 V
电源电压: 4.5 V ~ 5.5 V
电流 - 电源: 700µA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 14-WFDFN 裸露焊盘
供应商设备封装: 14-TDFN-EP(3x3)
包装: 标准包装
其它名称: MAX8792ETD+TDKR
Single Quick-PWM Step-Down
Controller with Dynamic REFIN
V FB REFIN + ? RIPPLE ?
= V
and triggers a constant on-time (DH driven high). When
the on-time has expired, the controller reenables the
low-side MOSFET until the controller detects that the
inductor current dropped below the zero-crossing
threshold. Starting with a DL pulse greatly reduces the
peak output voltage when compared to starting with a
DH pulse.
The output voltage at the beginning of the ultrasonic
pulse determines the negative ultrasonic current
threshold, resulting in the following equation:
V ISONIC = I L R CS = ( V REFIN ? V FB ) × 0 . 7
where V FB > V REFIN and R CS is the current-sense resis-
tance seen across GND to LX.
Valley Current-Limit Protection
The current-limit circuit employs a unique “valley” cur-
rent-sensing algorithm that senses the inductor current
through the low-side MOSFET. If the current through the
low-side MOSFET exceeds the valley current-limit thresh-
old, the PWM controller is not allowed to initiate a new
cycle. The actual peak current is greater than the valley
current-limit threshold by an amount equal to the induc-
tor ripple current. Therefore, the exact current-limit char-
acteristic and maximum load capability are a function of
the inductor value and input voltage. When combined
with the undervoltage protection circuit, this current-limit
method is effective in almost every circumstance.
In forced-PWM mode, the MAX8792 also implements a
negative current limit to prevent excessive reverse
inductor currents when V OUT is sinking current. The
negative current-limit threshold is set to approximately
120% of the positive current limit.
Integrated Output Voltage
The MAX8792 regulates the valley of the output ripple,
so the actual DC output voltage is higher than the
slope-compensated target by 50% of the output ripple
voltage. Under steady-state conditions, the MAX8792’s
internal integrator corrects for this 50% output ripple-
voltage error, resulting in an output voltage that is
accurately defined by the following equation:
? V ?
? A CCV ?
where V REFIN is the nominal feedback voltage, A CCV is
the integrator’s gain, and V RIPPLE is the feedback rip-
ple voltage (V RIPPLE = ESR x Δ I INDUCTOR as described
in the Output Capacitor Selection section). Therefore,
the feedback-voltage accuracy specification provided
in the Electrical Characteristics table actually refers to
the integrated feedback threshold and primarily reflects
the offset voltage of the integrator amplifier.
Dynamic Output Voltages
The MAX8792 regulates FB to the voltage set at REFIN.
By changing the voltage at REFIN (Figure 1), the
MAX8792 can be used in applications that require
dynamic output-voltage changes between two set
points. For a step-voltage change at REFIN, the rate of
change of the output voltage is limited either by the
internal 8mV/μs slew-rate circuit or by the component
selection —inductor current ramp, the total output
capacitance, the current limit, and the load during the
transition—whichever is slower. The total output capac-
itance determines how much current is needed to
change the output voltage, while the inductor limits the
current ramp rate. Additional load current slows down
the output voltage change during a positive REFIN volt-
age change, and speeds up the output voltage change
during a negative REFIN voltage change.
16
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