参数资料
型号: MAX8792ETD+T
厂商: Maxim Integrated Products
文件页数: 18/28页
文件大小: 0K
描述: IC PWM CTRLR STEP-DWN 14TDFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
应用: PWM 控制器
输入电压: 2 V ~ 26 V
电源电压: 4.5 V ~ 5.5 V
电流 - 电源: 700µA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 14-WFDFN 裸露焊盘
供应商设备封装: 14-TDFN-EP(3x3)
包装: 标准包装
其它名称: MAX8792ETD+TDKR
Single Quick-PWM Step-Down
Controller with Dynamic REFIN
POWER-GOOD AND FAULT PROTECTION
TARGET
-200mV
TARGET
+300mV
FB
EN
SOFT-START
OVP
COMPLETE
ONE-
SHOT
200 μ s
IN
OUT
UVP
FAULT
LATCH
OVP ENABLED
FAULT
POWER-GOOD
CLK
Figure 5. Power-Good and Fault Protection
voltage, connect an external pullup resistor between
PGOOD and V DD . A 100k Ω pullup resistor works well in
most applications. Figure 5 shows the power-good and
fault-protection circuitry.
Overvoltage Protection (OVP)
When the internal feedback voltage rises 300mV above
the target voltage and OVP is enabled, the OVP compara-
tor immediately pulls DH low and forces DL high, pulls
PGOOD low, sets the fault latch, and disables the SMPS
controller. Toggle EN or cycle V CC power below the V CC
POR to clear the fault latch and restart the controller.
Undervoltage Protection (UVP)
When the feedback voltage drops 200mV below the
target voltage (REFIN), the controller immediately pulls
PGOOD low and triggers a 200μs one-shot timer. If the
feedback voltage remains below the undervoltage fault
threshold for the entire 200μs, then the undervoltage
fault latch is set and the SMPS begins the shutdown
sequence. When the internal target voltage drops
below 0.1V, the MAX8792 forces DL low. Toggle EN or
cycle V CC power below V CC POR to clear the fault latch
and restart the controller.
Thermal-Fault Protection (TSHDN)
The MAX8792 features a thermal fault-protection circuit.
When the junction temperature rises above +160°C, a
thermal sensor activates the fault latch, pulls PGOOD
low, and shuts down the controller. Both DL and DH are
pulled low. Toggle EN or cycle V CC power below V CC
POR to reactivate the controller after the junction tem-
perature cools by 15°C.
MOSFET Gate Drivers
The DH and DL drivers are optimized for driving mode-
rate-sized high-side and larger low-side power
MOSFETs. This is consistent with the low duty factor
seen in notebook applications, where a large V IN -
V OUT differential exists. The high-side gate driver (DH)
sources and sinks 1.5A, and the low-side gate driver
(DL) sources 1.0A and sinks 2.4A. This ensures robust
gate drive for high-current applications. The DH high-
side MOSFET driver is powered by the internal boost
switch charge pump from BST to LX, while the DL syn-
chronous-rectifier driver is powered directly by the 5V
bias supply (V DD ).
18
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