参数资料
型号: MAX8792ETD+T
厂商: Maxim Integrated Products
文件页数: 21/28页
文件大小: 0K
描述: IC PWM CTRLR STEP-DWN 14TDFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
应用: PWM 控制器
输入电压: 2 V ~ 26 V
电源电压: 4.5 V ~ 5.5 V
电流 - 电源: 700µA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 14-WFDFN 裸露焊盘
供应商设备封装: 14-TDFN-EP(3x3)
包装: 标准包装
其它名称: MAX8792ETD+TDKR
Single Quick-PWM Step-Down
Controller with Dynamic REFIN
( R ESR + R PCB ) ≤ Δ I
? ? ( V IN OUT ) V OUT ? ?
R ESR ≤ ? ? V RIPPLE
Foldback Current Limit
Including an additional resistor between ILIM and the
output automatically creates a current-limit threshold that
folds back as the output voltage drops (see Figure 7).
The foldback current limit helps limit the inductor cur-
rent under fault conditions, but must be carefully
designed in order to provide reliable performance
under normal conditions. The current-limit threshold
must not be set too low, or the controller will not reliably
power up. To ensure the controller powers up properly,
the minimum current-limit threshold (when V OUT = 0V)
must always be greater than the maximum load during
startup (which at least consists of leakage currents),
plus the maximum current required to charge the out-
put capacitors:
I START = C OUT x 1mV/μs + I LOAD(START)
Output Capacitor Selection
The output filter capacitor must have low enough effec-
tive series resistance (ESR) to meet output ripple and
load-transient requirements. Additionally, the ESR
impacts stability requirements. Capacitors with a high
ESR value (polymers/tantalums) will not need additional
external compensation components.
In core and chipset converters and other applications
where the output is subject to large load transients, the
output capacitor’s size typically depends on how much
ESR is needed to prevent the output from dipping too
low under a load transient. Ignoring the sag due to
finite capacitance:
V STEP
LOAD ( MAX )
In low-power applications, the output capacitor’s size
often depends on how much ESR is needed to maintain
an acceptable level of output ripple voltage. The output
ripple voltage of a step-down controller equals the total
inductor ripple current multiplied by the output capaci-
tor’s ESR. The maximum ESR to meet ripple require-
ments is:
? V IN f SW L ?
? V
where f SW is the switching frequency.
5V BIAS
SUPPLY
C1
1 μ F
2
V DD
TON
BST
7
6
R TON
100k Ω
CBST
C IN
PWR
INPUT
4V TO 12V
AGND
C2
1 μ F
R10
PWR
13
V CC
DH
LX
5
4
0.1 μ F
L1
OUTPUT
1.50V 10A
1.05V 7A
ON OFF
GND/OPEN/REF/V DD
100k Ω
14
1
12
PGOOD
EN MAX8792
SKIP
DL
FB
3
8
PWR
C OUT
PWR
C3
AGND
1000pF
R1
11
REF
R8
100k Ω
AGND
R3
97.6k Ω
49.9k Ω
R2
54.9k Ω
10
REFIN
GND
ILIM
(EP)
9
R4
100k Ω
R5
100k Ω
REF
LO
HI
AGND
AGND
AGND
PWR
SEE TABLE 1 FOR COMPONENT SELECTION.
Figure 7. Standard Application with Foldback Current-Limit Protection
______________________________________________________________________________________
21
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