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| 型号： | MC34921AE |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 24/36页 |
| 文件大小： | 0K |
| 描述： | IC MOTOR DRVR PWM DC DUAL 64LQFP |
| 标准包装： | 800 |
| 应用： | DC 电机驱动器，步进电机驱动器，H 桥式 |
| 输出数： | 2 |
| 电流 - 输出： | ±4.5A |
| 电压 - 负载： | 0 V ~ 38 V |
| 电源电压： | 4.8 V ~ 5.2 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-LQFP 裸露焊盘 |
| 供应商设备封装： | 64-LQFP EP（10x10） |
| 包装： | 散装 |
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FUNCTIONAL DESCRIPTION
FUNCTIONAL INTERNAL BLOCK DESCRIPTION
V 3.3 , V CORE , B+, and TSD have both positive- and negative-
going thresholds.
Static Operating Specifications
The state of RST is guaranteed as long as the minimum
supervisor operating conditions of B+ ≥ 9.0 V and V 5.0 ≥
2.0 V and V 3.3 ≥ 1.5 V and V CORE are met. Once all these
conditions are met, RST is dependent on system operating
conditions. During initial power-up, RST is held low if any one
of the following error conditions is present: +5.0 V(low),
V CORE (low), +3.3 V(low), B+(low), or TSD. Once all voltages
reach their positive-going threshold, RST is set high after the
appropriate timing.
Dynamic Operating Specifications
The RST is a bidirectional signal with an open drain output
driver and a CMOS digital input gate (see Figure 12 ). This I/
O structure allows wired OR connection to the CPU’s RST I/
O terminal, as well as allowing the CPU to initiate a reset
cycle by driving its RST terminal low. When responding to a
CPU request for a reset cycle, the 34921 IC must respond
externally applied RST signal.
To Internal
Registers
i.e., the RST input can be inhibited for up to t phsl (max). Error
conditions must be present for a minimum time, t filter , before
the 34921 responds to them. Once all error conditions are
cleared, RST is held low for an additional time of t delay ,
128 SCLK periods. If any monitored item falls below its
negative-going threshold for t filter , 1.5 μ s to 5.0 μ s, the t delay
count is restarted when system operating conditions are met,
regardless of whether the t delay count has been completed.
The trigger for the t delay retriggerable one shot is
([+5.0 V(low) + 3.3 V(low) + V CORE (low) + B+(low) + TSD]
and t filter ), where t filter is the 1.5 μ s to 5.0 μ s delay.
RST and Thermal Shutdown State (TSD) Definition
There are seven registers in the INFO output word where
the trigger for the reset is recorded. This includes externally
generated resets as well as all the fault conditions listed in the
Supervisory Functions section of this datasheet. These
registers will remain valid as long as B+ ≥ 9.0 V. The fault
registers will only be cleared upon an externally generated
RST and will not be guaranteed for B+ < 9.0 V; i.e., initial
power-up or a serious B+ fault. The EXT bit will only be set
upon an externally generated reset.
Whenever RST is asserted and TSD is not set, the MISO
terminal will enter a high-impedance state, all the step motor
outputs will be off, and all the DC motor low-side drives will
be on. In addition, all internal data registers excepting the
RST fault registers in the INFO output word will be set to their
default values.
The thermal shutdown circuitry will monitor the chip’s
internal temperature at various points. The overtemperature
From
Internal
Reset
Circuits
RST
C LOAD
Optional
circuitry will disable all circuitry on the 34921 IC with the
exception of the RST output. RST will be asserted when the
temperature exceeds 140°C. This condition will be
maintained (regulators shut down in accordance with
thermal hysteresis amount, at which time the 5.0 V and 3.3 V
regulators will restart and the supervisor circuit will issue a full
Figure 12. RST Terminal Interface
The rise time with the open drain circuit may be relatively
slow, and the internal RST input gate must operate reliably
(no oscillations during the transition) under these conditions;
Table 6. Regulator Shutdown Schedule
length reset pulse. The system will then perform a normal
restart. The purpose of this circuitry is to prevent damage to
the 34921 owing to inadvertent high dissipation in the motor
drivers.
Condition
RST
TSD and RST
TSDCore and RST
XDCMA (26)
0
Z
Z
XDCMB (26)
0
Z
Z
SX
OFF
OFF
OFF
SX
OFF
OFF
OFF
5.0 V
ON
OFF
OFF
V CORE
ON
ON
OFF
3.3 V
ON
OFF
OFF
Fault Registers
Updated at falling RST
Updated at falling RST
Updated at falling RST
Other Data
Registers
Default value
Default value
Default value
Notes
26. XDCMA and XDCMB: 0 means low-side ON, 1 means high-side ON, Z means both OFF.
ANALOG ENCODER INTERFACE
Introduction
complete interface for an analog quadrature encoder, such
as an Agilent Technologies HEDS-9710/HEDS-9711 series
of analog output small optical encoder modules.
The analog encoder interface is intended to provide a
34921
Analog Integrated Circuit Device Data
24
Freescale Semiconductor
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相关代理商/技术参数 |
参数描述 |
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| MC34921AER2 | 功能描述:马达/运动/点火控制器和驱动器 DUAL PWM DC MOTOR DRIVE RoHS:否 制造商:STMicroelectronics 产品:Stepper Motor Controllers / Drivers 类型:2 Phase Stepper Motor Driver 工作电源电压:8 V to 45 V 电源电流:0.5 mA 工作温度:- 25 C to + 125 C 安装风格:SMD/SMT 封装 / 箱体:HTSSOP-28 封装:Tube |
| MC34923 | 制造商:SPC Multicomp 功能描述:HEADER VERTICAL 3WAY 制造商:SPC Multicomp 功能描述:HEADER, VERTICAL, 3WAY 制造商:SPC Multicomp 功能描述:WIRE-BOARD CONNECTOR, RCPT, 3POS, 4.2MM; Series:2266(5566)RA; Pitch Spacing:4.2mm; Contact Termination:Through Hole Vertical; No. of Contacts:3; No. of Rows:1; Connector Mounting:PCB; Gender:Receptacle; Contact Material:Brass ;RoHS Compliant: Yes |
| MC34923DW | 功能描述:马达/运动/点火控制器和驱动器 Motor Driver RoHS:否 制造商:STMicroelectronics 产品:Stepper Motor Controllers / Drivers 类型:2 Phase Stepper Motor Driver 工作电源电压:8 V to 45 V 电源电流:0.5 mA 工作温度:- 25 C to + 125 C 安装风格:SMD/SMT 封装 / 箱体:HTSSOP-28 封装:Tube |
| MC34923EG | 功能描述:马达/运动/点火控制器和驱动器 Full-Bridge PWM Motor Driver RoHS:否 制造商:STMicroelectronics 产品:Stepper Motor Controllers / Drivers 类型:2 Phase Stepper Motor Driver 工作电源电压:8 V to 45 V 电源电流:0.5 mA 工作温度:- 25 C to + 125 C 安装风格:SMD/SMT 封装 / 箱体:HTSSOP-28 封装:Tube |
| MC34923EGR2 | 功能描述:马达/运动/点火控制器和驱动器 VERSION RoHS:否 制造商:STMicroelectronics 产品:Stepper Motor Controllers / Drivers 类型:2 Phase Stepper Motor Driver 工作电源电压:8 V to 45 V 电源电流:0.5 mA 工作温度:- 25 C to + 125 C 安装风格:SMD/SMT 封装 / 箱体:HTSSOP-28 封装:Tube |
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