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参数资料
| 型号： | MC34921AE |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 27/36页 |
| 文件大小： | 0K |
| 描述： | IC MOTOR DRVR PWM DC DUAL 64LQFP |
| 标准包装： | 800 |
| 应用： | DC 电机驱动器，步进电机驱动器，H 桥式 |
| 输出数： | 2 |
| 电流 - 输出： | ±4.5A |
| 电压 - 负载： | 0 V ~ 38 V |
| 电源电压： | 4.8 V ~ 5.2 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-LQFP 裸露焊盘 |
| 供应商设备封装： | 64-LQFP EP（10x10） |
| 包装： | 散装 |
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FUNCTIONAL DESCRIPTION
FUNCTIONAL INTERNAL BLOCK DESCRIPTION
SCLK
Channel Select Logic
Idle
Start
AN0/ANALOGOUT_A
AN1/ANALOGOUT_B
Start
A2Ddone1=0
A2Ddone2=0
A/Da=Last Address
A/Dd=Last
S/H
AN2/ANALOGIN_A
A
I/V
Convert
A2Ddone1=0
A2Ddone2=0
A/Da=Current
Address
A/Dd=Last
Conversion
Conversion
Done
Send Data
Start
Conversion
Start
Start
Start
Send Data2
A2Ddone1=0
A2Ddone2=1
A/Da=Current
Address
A/Dd=Current
Conversion
C < 11.7 pF AN3/ANALOGIN_B
hold
I/V
A
B
B
Multiplexer R DS(on) < 8.0 k ?
Figure 14. A/D Converter Input Structure
ADC Output Addressing
A2Ddone1=0
A2Ddone2=0
A2Da=Current
Address
A2Dd=Current
Conversion
A/Da=1
Conversion
Done
Convert2
A2Ddone1=0
A2Ddone2=0
A/Da=Current
Address
A/Dd=Last
Conversion
The return word to the digital subsystem also contains two
conversion done bits, A/Ddone1 and A/Ddone2 (refer to
and the first conversion when input pairs are selected. The
A/Ddone2 bit is used for the second conversion when input
pairs are selected. A zero to one transition of these bits on
successive return words indicates that a conversion cycle is
complete and the data sent in that return word is valid for that
conversion. The conversion done bits will only be asserted for
Note “Start” is bit 1 of the serial input normal frame.
A/D Converter Input Structure
The input impedance of a selected channel is an RC
circuit. As shown in Figure 14 , the input impedance of the
one serial frame, although the data may be valid for multiple
frames. The A/Dr bits indicate which A/D input is being
reported when data is valid (refer to Table 9 ).
Table 8. A/D Done Bits
selected channel is a resistor connected to the sample and
hold (S/H) capacitor. The sample and hold time is 15 * t SCLK ,
or a minimum of 0.9285 μ s. The tolerances of the internal S/
H components are such that a time constant is about 93.6 ns.
Therefore to achieve a proper level on the S/H capacitor
A/Ddone1
Rising
0
A/Ddone2
0
Rising
Return Data and A/Dr Value
Valid for single or first conversion
Valid for second conversion
A/D Value Reported
(5*93.6 ns) = 0.468 μ s, minimum, is required to satisfy
internal component time constants. This only allows 460 ns
for external time constants. Therefore, the maximum source
impedance of the circuit driving the selected A/D channel is
7.8 k ? when the SCLK speed matches the speed
configuration bit.
0 0 Don’t care
Table 9. A/D Channel of Current A/D Data
NORMAL NORMAL NORMAL
Output Output Output
Frame Frame Frame
Bit 4 Bit 5 Bit 6
A/Dr0
A/Dr1
A/Dr2
0
1
0
1
0
1
0
0
0
1
1
0
0
1
1
1
1
1
0
0
0
A
B
A
B
AN0/ANALOGOUT_A
AN1/ANALOGOUT_B
AN2/ANALOGIN_A
(direct input)
1
1
0
AN3/ANALOGIN_B
(direct input)
34921
Analog Integrated Circuit Device Data
Freescale Semiconductor
27
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| MC34923EGR2 | 功能描述:马达/运动/点火控制器和驱动器 VERSION RoHS:否 制造商:STMicroelectronics 产品:Stepper Motor Controllers / Drivers 类型:2 Phase Stepper Motor Driver 工作电源电压:8 V to 45 V 电源电流:0.5 mA 工作温度:- 25 C to + 125 C 安装风格:SMD/SMT 封装 / 箱体:HTSSOP-28 封装:Tube |
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