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参数资料
型号： MC68HC908RK2DW
厂商： FREESCALE SEMICONDUCTOR INC
元件分类： 微控制器/微处理器
英文描述： 8-BIT, FLASH, 4 MHz, MICROCONTROLLER, PDSO20
封装： PLASTIC, SOIC-20
文件页数： 83/158页
文件大小： 1020K
代理商： MC68HC908RK2DW
Memory
MC68HC908RK2 Data Sheet, Rev. 5.1
30
Freescale Semiconductor
2.5.1 FLASH 2TS Control Register
The FLASH 2TS control register (FLCR) controls program, erase, and margin read operations.
FDIV0 — Frequency Divide Control Bit
This read/write bit selects the factor by which the charge pump clock is divided from the system clock.
See 2.5.2 FLASH 2TS Charge Pump Frequency Control.
BLK1 — Block Erase Control Bit
This read/write bit together with BLK0 allows erasing of blocks of varying size. See 2.5.3 FLASH 2TS
Erase Operation for a description of available block sizes.
BLK0 — Block Erase Control Bit
This read/write bit together with BLK1 allows erasing of blocks of varying size. See 2.5.3 FLASH 2TS
Erase Operation for a description of available block sizes.
HVEN — High-Voltage Enable Bit
This read/write bit enables the charge pump to drive high voltages for program and erase operations
in the array. HVEN can be set only if either PGM = 1 or ERASE = 1 and the proper sequence for smart
programming or erase is followed.
1 = High voltage enabled to array and charge pump on
0 = High voltage disabled to array and charge pump off
MARGIN — Margin Read Control Bit
This read/write bit configures the memory for margin read operation. MARGIN cannot be set if the
HVEN = 1. MARGIN will automatically return to unset (0) if asserted when HVEN = 1.
1 = Margin read operation selected
0 = Margin read operation unselected
ERASE — Erase Control Bit
This read/write bit configures the memory for erase operation. ERASE is interlocked with the PGM bit
such that both bits cannot be set at the same time.
1 = Erase operation selected
0 = Erase operation unselected
PGM — Program Control Bit
This read/write bit configures the memory for program operation. PGM is interlocked with the ERASE
bit such that both bits cannot be set at the same time.
1 = Program operation selected
0 = Program operation unselected
Address:
$FE08
Bit 7
654321
Bit 0
Read:
0
FDIV0
BLK1
BLK0
HVEN
MARGIN
ERASE
PGM
Write:
Reset:
00000000
= Unimplemented
Figure 2-3. FLASH 2TS Control Register (FLCR)
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