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参数资料
型号： MC68HC908RK2DW
厂商： FREESCALE SEMICONDUCTOR INC
元件分类： 微控制器/微处理器
英文描述： 8-BIT, FLASH, 4 MHz, MICROCONTROLLER, PDSO20
封装： PLASTIC, SOIC-20
文件页数： 84/158页
文件大小： 1020K
代理商： MC68HC908RK2DW
FLASH 2TS Memory
MC68HC908RK2 Data Sheet, Rev. 5.1
Freescale Semiconductor
31
2.5.2 FLASH 2TS Charge Pump Frequency Control
The internal charge pump, required for program, margin read, and erase operations, is designed to
operate most efficiently with a 2-MHz clock. The charge pump clock is derived from the bus clock.
Table 2-2 shows how the FDIV bits are used to select a charge pump frequency based on the bus clock
frequency. Program, margin read, and erase operations cannot be performed if the bus clock frequency
is below 2 MHz.
NOTE
The charge pump is optimized for 2-MHz operation.
2.5.3 FLASH 2TS Erase Operation
Use this step-by-step procedure to erase a block of FLASH 2TS memory. Refer to 13.11 Memory
Characteristics for a detailed description of the times used in this algorithm.
1.
Set the ERASE, BLK0, BLK1, and FDIV0 bits in the FLASH 2TS control register. Refer to Table
2-2 for FDIV settings and to Table 2-3 for block sizes.
2.
Ensure target portion of array is unprotected by reading the block protect register at address
$FFF0. Refer to 2.5.5 FLASH 2TS Block Protection and 2.5.6 FLASH 2TS Block Protect Register
for more information.
3.
Write to any FLASH 2TS address with any data within the block address range desired.
4.
Set the HVEN bit.
5.
Wait for a time, tErase.
6.
Clear the HVEN bit.
7.
Wait for a time, t Kill, for the high voltages to dissipate.
8.
Clear the ERASE bit.
9.
After a time, tHVD, the memory can be accessed in read mode again.
NOTE
While these operations must be performed in the order shown, other
unrelated operations may occur between the steps.
Table 2-3 shows the various block sizes which can be erased in one erase operation.
In step 3 of the erase operation, the cared addresses are latched and used to determine the location of
the block to be erased. For instance, with BLK0 = BLK1 = 0, writing to any FLASH 2TS address in the
range $7800 to $78F0 will enable the erase of all FLASH memory.
Table 2-2. Charge Pump Clock Frequency
FDIV0
Pump Clock Frequency
0
Bus frequency
÷ 1
1
Bus frequency
÷ 2
Table 2-3. Erase Block Sizes
BLK1
BLK0
Block Size, Addresses Cared
0
Full array: 2 Kbytes
0
1
One-half array: 1 Kbytes
1
0
Eight rows: 64 bytes
1
Single row: 8 bytes
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