参数资料
型号: MC7455ARX867LG
厂商: MOTOROLA INC
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 867 MHz, RISC PROCESSOR, CBGA483
封装: 29 X 29 MM, 1.27 MM PITCH, CERAMIC, BGA-483
文件页数: 7/76页
文件大小: 1520K
代理商: MC7455ARX867LG
MOTOROLA
MPC7455 RISC Microprocessor Hardware Specifications
15
Electrical and Thermal Characteristics
1.5.2
AC Electrical Characteristics
This section provides the AC electrical characteristics for the MPC7455. After fabrication, functional parts
are sorted by maximum processor core frequency as shown in Section 1.5.2.1, “Clock AC Specifications,”
and tested for conformance to the AC specifications for that frequency. The processor core frequency is
determined by the bus (SYSCLK) frequency and the settings of the PLL_CFG[0:4] signals. Parts are sold
by maximum processor core frequency; see Section 1.11, “Ordering Information.”
1.5.2.1
Clock AC Specifications
Table 8 provides the clock AC timing specifications as defined in Figure 3.
Deep Sleep Mode (PLL Disabled)
Typical
7.3
W
1, 3
Notes:
1. These values apply for all valid processor bus and L3 bus ratios. The values do not include I/O supply power
(OVDD and GVDD) or PLL supply power (AVDD). OVDD and GVDD power is system dependent, but is typically <5%
of VDD power. Worst case power consumption for AVDD < 3 mW.
2. Maximum power is measured at nominal VDD (see Table 4) while running an entirely cache-resident, contrived
sequence of instructions which keep the execution units, with or without AltiVec, maximally busy.
3. Typical power is an average value measured at the nominal recommended VDD (see Table 4) and 65°C in a
system while running a typical code sequence.
4. Doze mode is not a user-definable state; it is an intermediate state between full-power and either nap or sleep
mode. As a result, power consumption for this mode is not tested.
Table 8. Clock AC Timing Specifications
At recommended operating conditions. See Table 4.
Characteristic
Symbol
Maximum Processor Core Frequency
Unit
Notes
733 MHz
867 MHz
933 MHz
1 GHz
Min
Max
Min
Max
Min
Max
Min
Max
Processor frequency
fcore
500
733
500
867
500
933
500
1000
MHz
1
VCO frequency
fVCO
1000
1466
1000
1734
1000
1866
1000
2000
MHz
1
SYSCLK frequency
fSYSCLK
33
13333133
33
13333133
MHz
1
SYSCLK cycle time
tSYSCLK
7.5307.5
30
7.5307.5
30
ns
SYSCLK rise and fall time
tKR, tKF
—1.0
ns
2
SYSCLK duty cycle
measured at OVDD/2
tKHKL/
tSYSCLK
40
60
40
60
40
60
40
60
%
3
SYSCLK jitter
± 150
± 150
± 150
± 150
ps
4, 6
Table 7. Power Consumption for MPC7455 (continued)
Processor (CPU) Frequency
Unit
Notes
733 MHz
867 MHz
933 MHz
1 GHz
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