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参数资料
| 型号： | MC88915TFN160R2 |
| 厂商： | MOTOROLA INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 88915 SERIES, PLL BASED CLOCK DRIVER, 7 TRUE OUTPUT(S), 1 INVERTED OUTPUT(S), PQCC28 |
| 封装： | PLASTIC, LCC-28 |
| 文件页数： | 16/19页 |
| 文件大小： | 181K |
| 代理商： | MC88915TFN160R2 |
MC88915T
MOTOROLA ADVANCED CLOCK DRIVERS DEVICE DATA
17
MC88915TFN100
SYNC INPUT TIMING REQUIREMENTS
Symbol
Parameter
Minimum
Maximum
Unit
tRISE/FALL,SYNC Inputs
Rise/Fall Time, SYNC Inputs From 0.8 to 2.0V
—
3.0
ns
tCYCLE, SYNC Inputs
Input Clock Period SYNC Inputs
20.0 1
200 2
ns
Duty Cycle SYNC Inputs
Input Duty Cycle SYNC Inputs
50%
±25%
1. These tCYCLE minimum values are valid when ‘Q’ output is fed back and connected to the FEEDBACK pin. This is the configuration shown
in Figure 5b.
2. Information in Table 1 and in Note 3 of the AC specification notes describe this specification and its limits depending on what output is fed back,
and if FREQ_SEL
is high or low.
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND) TA =–40° C to +85° C, VCC = 5.0 V ± 5%
Symbol
Parameter
Test Conditions
VCC
V
Target Limit
Unit
VIH
Minimum High–Level Input
Voltage
Vout = 0.1 V or VCC – 0.1 V
4.75
5.25
2.0
V
VIL
Maximum Low–Level Input
Voltage
Vout = 0.1 V or VCC – 0.1 V
4.75
5.25
0.8
V
VOH
Minimum High–Level Output
Voltage
Vin = VIH or VIL
IOH = –36 mA 1
4.75
5.25
4.01
4.51
V
VOL
Maximum Low–Level Output
Voltage
Vin = VIH or VIL
IOL = 36 mA 1
4.75
5.25
0.44
V
Iin
Maximum Input Leakage Current
VI = VCC or GND
5.25
±1.0
A
ICCT
Maximum ICC/Input
VI = VCC – 2.1 V
5.25
2.0
2
mA
IOLD
Minimum Dynamic Output Current 3
VOLD = 1.0V Max
5.25
88
mA
IOHD
VOHD = 3.85V Min
5.25
–88
mA
ICC
Maximum Quiescent Supply
Current (per Package)
VI = VCC or GND
5.25
1.0
mA
IOZ
Maximum 3–State Leakage Current
VI = VIH or VIL;VO = VCC or GND
5.25
±50 4
A
1. IOL and IOH are 12mA and –12mA respectively for the LOCK output.
2. The PLL_EN input pin is not guaranteed to meet this specification.
3. Maximum test duration is 2.0ms, one output loaded at a time.
4. Specification value for IOZ is preliminary, will be finalized upon ‘MC’ status.
CAPACITANCE AND POWER SPECIFICATIONS
Symbol
Parameter
Typical Values
Unit
Conditions
CIN
Input Capacitance
4.5
pF
VCC = 5.0 V
CPD
Power Dissipation Capacitance
40
pF
VCC = 5.0 V
PD1
Power Dissipation @ 50MHz with 50
Thevenin Termination
23mW/Output
184mW/Device
mW
VCC = 5.0 V
T = 25
°C
PD2
Power Dissipation @ 50MHz with 50
Parallel Termination to GND
57mW/Output
456mW/Device
mW
VCC = 5.0 V
T = 25
° C
NOTE: PD1 and PD2 mW/Output numbers are for a ‘Q’ output.
FREQUENCY SPECIFICATIONS (TA =–40° C to +85° C, VCC = 5.0 V ±5%)
Guaranteed Minimum
Symbol
Parameter
TFN100
Unit
fmax 1
Maximum Operating Frequency (2X_Q Output)
100
MHz
Maximum Operating Frequency (Q0–Q4,Q5 Output)
50
MHz
1. Maximum Operating Frequency is guaranteed with the part in a phase–locked condition, and all outputs loaded with 50
terminated to VCC/2.
2
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