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参数资料
| 型号： | MC88915TFN160R2 |
| 厂商： | MOTOROLA INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 88915 SERIES, PLL BASED CLOCK DRIVER, 7 TRUE OUTPUT(S), 1 INVERTED OUTPUT(S), PQCC28 |
| 封装： | PLASTIC, LCC-28 |
| 文件页数： | 5/19页 |
| 文件大小： | 181K |
| 代理商： | MC88915TFN160R2 |
MC88915T
MOTOROLA ADVANCED CLOCK DRIVERS DEVICE DATA
24
2.25ns OFFSET
With the 1M resistor tied in this fashion, the tPD specification
measured at the input pins is:
330
R2
330
R2
FEEDBACK OUTPUT
SYNC INPUT
FEEDBACK OUTPUT
SYNC INPUT
5.0V
3.0V
5.0V
ANALOG VCC
ANALOG GND
RC1
1M
REFERENCE
RESISTOR
0.1F
C1
With the 1M resistor tied in this fashion, the tPD specification
measured at the input pins is:
EXTERNAL LOOP FILTER
ANALOG GND
RC1
1M
REFERENCE
RESISTOR
0.1F
C1
Figure 2. Depiction of the Fixed SYNC to Feedback Offset (tPD)
Which is Present When a 1M
Resistor is Tied to VCC or Ground
3
tPD = 2.25ns ± 1.0ns
tPD = -0.775ns ± 0.275ns
-0.775ns OFFSET
5. The tSKEWr specification guarantees that the rising edges of
outputs Q/2, Q0, Q1, Q2, Q3, and Q4 will always fall within
a 500ps window within one part. However, if the relative
position of each output within this window is not specified,
the 500 ps window must be added to each side of the tPD
specification limits to calculate the total part–to–part skew.
For this reason the absolute distribution of these outputs
are provided in table 2. When taking the skew data, Q0 was
used as a reference, so all measurements are relative to
this output. The information in Table 2 is derived from
measurements taken from the 14 process lots described in
Note 1, over the temperature and voltage range.
Table 2. Relative Positions of Outputs Q/2, Q0–Q4, 2X_Q,
Within the 500ps tSKEWr Spec Window
Output
–
(ps)
+
(ps)
Q0
0
Q1
–72
40
Q2
–44
276
Q3
–40
255
Q4
–274
–34
Q/2
–16
250
2X_Q
–633
–35
2
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