参数资料
型号: MCZ33905S5EK
厂商: Freescale Semiconductor
文件页数: 20/106页
文件大小: 0K
描述: IC SYSTEM BASIS CHIP GEN2 32SOIC
标准包装: 42
应用: 系统基础芯片
接口: CAN,LIN
电源电压: 5.5 V ~ 27 V
封装/外壳: 32-BSOP(0.295",7.50mm 宽)裸露焊盘
供应商设备封装: 32-SOICW 裸露焊盘
包装: 管件
安装类型: 表面贴装
Analog Integrated Circuit Device Data
20
Freescale Semiconductor
33903/4/5
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
VDD VOLTAGE REGULATOR, VDD PIN
Output Voltage
VDD 5.0 V, VSUP 5.5 to 28 V, IOUT 0 to 150 mA
VDD = 5.0 V, under EMC immunity test condition (19)
VDD 3.3 V, VSUP 5.5 to 28 V, IOUT 0 to 150 mA
VOUT-5.0
VOUT-5.0-EMC
VOUT-3.3
4.9
3.234
5.0
3.3
5.1
5.15
3.4
V
Drop voltage without external PNP pass transistor(20)
VDD 5.0 V, IOUT 100 mA
VDD 5.0 V, IOUT 150 mA
VDROP
-
330
-
450
500
mV
Drop voltage with external transistor(20)
IOUT 200 mA (I_BALLAST + I_INTERNAL)
VDROP-B
-
350
500
mV
VSUP/1 to maintain VDD within VOUT-3.3 specified voltage range
VDD 3.3 V, IOUT 150 mA
VDD 3.3 V, IOUT 200 mA, external transistor implemented
VSUP1-3.3
4.0
-
V
External ballast versus internal current ratio (I_BALLAST = K x Internal current)
K
1.5
2.0
2.5
Output Current limitation, without external transistor
ILIM
150
350
550
mA
Temperature pre-warning (Guaranteed by design)
TPW
-
140
-
°C
Thermal shutdown (Guaranteed by design)
TSD
160
-
°C
Range of decoupling capacitor (Guaranteed by design)(21)
CEXT
4.7
-
100
F
LP mode VDD ON, IOUT 50 mA (time limited)
VDD 5.0 V, 5.6 V VSUP 28 V
VDD 3.3 V, 5.6 V VSUP 28 V
VDDLP
4.75
3.135
5.0
3.3
5.25
3.465
V
LP mode VDD ON, dynamic output current capability (Limited duration. Ref. to
device description).
LP-IOUTDC
-
50
mA
LP VDD ON mode:
Overcurrent Wake-up threshold.
Hysteresis
LP-ITH
1.0
0.1
3.0
1.0
-
mA
LP mode VDD ON, drop voltage, at IOUT 30 mA (Limited duration. Ref. to
device description) (20)
LP-VDROP
-
200
400
mV
LP mode VDD ON, min VSUP operation (Below this value, a VDD, undervoltage
reset may occur)
LP-MINVS
5.5
-
V
VDD when VSUP < VSUP-TH1, at I_VDD 10 A (Guaranteed by design)
VDD_OFF
-
0.3
V
VDD when VSUP VSUP-TH1, at I_VDD 40 mA (Guaranteed with parameter
VSUP-TH1
VDD_START UP
3.0
-
V
Notes
19.
Guaranteed by design. During immunity tests, according to IEC62132-4, with RF injection applied to CAN or LIN pins. No filter
components on CAN or LIN pins. When immunity tests are performed with a CAN filter component (common mode choke) or LIN filter
component (capacitor), the VDD specification is 5.0 V 2%.
20.
For 3.3 V VDD devices, the drop-out voltage test condition leads to a VSUP below the min VSUP threshold (4.0 V). As a result, the dropout
voltage parameter cannot be specified.
21.
The regulator is stable without an external capacitor. Usage of an external capacitor is recommended for AC performance.
Table 6. Static Electrical Characteristics (continued)
Characteristics noted under conditions 5.5 V
VSUP 28 V, -40 C TA 125 C, unless otherwise noted. Typical values
noted reflect the approximate parameter means at TA = 25 °C under nominal conditions, unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
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