参数资料
型号: MCZ33905S5EK
厂商: Freescale Semiconductor
文件页数: 94/106页
文件大小: 0K
描述: IC SYSTEM BASIS CHIP GEN2 32SOIC
标准包装: 42
应用: 系统基础芯片
接口: CAN,LIN
电源电压: 5.5 V ~ 27 V
封装/外壳: 32-BSOP(0.295",7.50mm 宽)裸露焊盘
供应商设备封装: 32-SOICW 裸露焊盘
包装: 管件
安装类型: 表面贴装
Analog Integrated Circuit Device Data
88
Freescale Semiconductor
33903/4/5
SERIAL PERIPHERAL INTERFACE
FLAGS AND DEVICE STATUS
INT
INT request
Description
Report that INT source is an INT request from a SPI command.
Set / Reset condition
Set: INT occurred. Reset: flag read (SPI)
RST high
Description
Report that RST pin is shorted to high voltage.
Set / Reset condition
Set: RST failure detection. Reset: flag read.
DBG resistor
Description
Report that the resistor at DBG pin is different from expected (different from SPI register content).
Set / Reset condition
Set: failure detected. Reset: correct resistor and flag read (SPI).
VDD TEMP PRE-
WARNING
Description
Report that the VDD has reached overtemperature pre-warning threshold.
Set / Reset condition
Set: VDD thermal sensor above threshold. Reset: VDD thermal sensor below threshold and flag read
(SPI)
VDD UV
Description
Reports that VDD pin is lower than the VDDUV threshold.
Set / Reset condition
Set: VDD below threshold for t >100
s typically. Reset: VDD above threshold and flag read (SPI)
VDD
overVOLTAGE
Description
Reports that VDD pin is higher than the typically VDD + 0.6 V threshold. I/O-1 can be turned OFF if
this function is selected in INIT register.
Set / Reset condition
Set: VDD above threshold for t >100
s typically. Reset: VDD below threshold and flag read (SPI)
VAUX_overVOL
TAGE
Description
Reports that VAUX pin is higher than the typically VAUX + 0.6 V threshold. I/O-1 can be turned OFF if
this function is selected in INIT register.
Set / Reset condition
Set: VAUX above threshold for t >100 s typically. Reset: VAUX below threshold and flag read (SPI)
VDD LOW
>100 ms
Description
Reports that VDD pin is lower than the VDDUV threshold for a time longer than 100 ms
Set / Reset condition
Set: VDD below threshold for t >100 ms typically. Reset: VDD above threshold and flag read (SPI)
VDD LOW
Description
Report that VDD is below VDD undervoltage threshold.
Set / Reset condition
Set: VDD below threshold. Reset: fag read (SPI)
VDD (5.0 V or
3.3 V)
Description
0: mean 3.3 V VDD version
1: mean 5.0 V VDD version
Set / Reset condition
N/A
Device P/N1
and 0
Description
Describe the device part number:
00: MC33903
01: MC33904
10: MC33905S
11: MC333905D
Set / Reset condition
N/A
Device id 4 to
0
Description
Describe the silicon revision number
10010: silicon revision A (Pass 3.1)
10011: silicon revision B (Pass 3.2)
10100: silicon revision C (Pass 3.3)
Set / Reset condition
N/A
RST low
>100 ms
Description
Report that the RST pin has detected a low level, longer than 100 ms (Reset permanent low)
Set / Reset condition
Set: after detection of reset low pulse. Reset: Reset pulse terminated and flag read (SPI)
Multiple
Resets
Description
Report that the more than 8 consecutive reset pulses occurred, due to missing or wrong watchdog
refresh.
Set / Reset condition
Set: after detection of multiple reset pulses. Reset: flag read (SPI)
watchdog
refresh failure
Description
Report that a wrong or missing watchdog failure occurred.
Set / Reset condition
Set: failure detected. reset: flag read (SPI)
Table 40. Flag Descriptions
Flag
Description
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