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| 型号： | MCZ33905S5EK |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 42/106页 |
| 文件大小： | 0K |
| 描述： | IC SYSTEM BASIS CHIP GEN2 32SOIC |
| 标准包装： | 42 |
| 应用： | 系统基础芯片 |
| 接口： | CAN，LIN |
| 电源电压： | 5.5 V ~ 27 V |
| 封装/外壳： | 32-BSOP（0.295"，7.50mm 宽）裸露焊盘 |
| 供应商设备封装： | 32-SOICW 裸露焊盘 |
| 包装： | 管件 |
| 安装类型： | 表面贴装 |
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Analog Integrated Circuit Device Data
40
Freescale Semiconductor
33903/4/5
FUNCTIONAL DEVICE OPERATION
LP MODES
Debug can be left by removing 8 to 10 V from the DEBUG
pin, or by the SPI command (Ref. to MODE register).
The 5 V-CAN regulator is ON by default in Debug mode.
LP MODES
The device has two main LP modes: LP mode with VDD
OFF, and LP mode with VDD ON.
Prior to entering into LP mode, I/O and CAN Wake-up
flags must be cleared (Ref. to mode register). If the Wake-up
flags are not cleared, the device will not enter into LP mode.
In addition, the CAN failure flags (i.e. CAN_F and CAN_UF)
must be cleared, in order to meet the LP current consumption
specification.
LP - VDD OFF
In this mode, VDD is turned OFF and the MCU connected
to VDD is unsupplied. This mode is entered using SPI. It can
also be entered by an automatic transition due to fail-safe
management. 5 V-CAN and VAUX regulators are also turned
OFF.
When the device is in LP VDD OFF mode, it monitors
external events to Wake-up and leave the LP mode. The
Wake-up events can occur from:
CAN
LIN interface, depending upon device part number
Expiration of an internal timer
I/O-0, and I/O-1 inputs, and depending upon device part
number and configuration, I/O-2 and/or -3 input
Cyclic sense of I/O-1 input, associated by I/O-0
activation, and depending upon device part number and
configuration, cyclic sense of I/O-2 and -3 input,
associated by I/O-0 activation
When a Wake-up event is detected, the device enters into
Reset mode and then into Normal Request mode. The Wake-
up sources are reported to the device SPI registers. In
summary, a Wake-up event from LP VDD OFF leads to the
VDD regulator turned ON, and the MCU operation restart.
LP - VDD ON
In this mode, the voltage at the VDD pin remains at 5.0 V
(or 3.3 V, depending upon device part number). The
objective is to maintain the MCU powered, with reduced
consumption. In such mode, the DC output current is
expected to be limited to 100
A or a few mA, as the ECU is
in reduced power operation mode.
During this mode, the 5 V-CAN and VAUX regulators are
OFF. The optional external PNP at VDD will also be
automatically disabled when entering this mode.
The same Wake-up events as in LP VDD OFF mode (CAN,
LIN, I/O, timer, cyclic sense) are available in LP VDD on
mode.
In addition, two additional Wake-up conditions are
available.
Dedicated SPI command. When device is in LP VDD ON
mode, the Wake-up by SPI command uses a write to
“Normal Request mode”, 0x5C10.
Output current from VDD exceeding LP-ITH threshold.
In LP VDD ON mode, the device is able to source several
tenths of mA DC. The current source capability can be time
limited, by a selectable internal timer. Timer duration is up to
32 ms, and is triggered when the output current exceed the
output current threshold typically 1.5 mA.
This allows for instance, a periodic activation of the MCU,
while the device remains in LP VDD on mode. If the duration
exceed the selected time (ex 32 ms), the device will detect a
Wake-up.
Wake-up events are reported to the MCU via a low level
pulse at INT pulse. The MCU will detect the INT pulse and
resume operation.
Watchdog Function in LP VDD ON Mode
It is possible to enable the watchdog function in LP VDD
ON mode. In this case, the principle is timeout.
Refresh of the watchdog is done either by:
a dedicated SPI command (different from any other SPI
command or simple CS activation which would Wake-
up - Ref. to the previous paragraph)
or by a temporary (less than 32 ms max) VDD over
current Wake-up (IDD > 1.5 mA typically).
As long as the watchdog refresh occurs, the device
remains in LP VDD on mode.
Mode Transitions
Mode transitions are either done automatically (i.e. after a
timeout expired or voltage conditions), or via a SPI command,
or by an external event such as a Wake-up. Some mode
changes are performed using the Secured SPI commands.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MCZ33905S5EK/R2 | 制造商:Freescale Semiconductor 功能描述:IC SBC GEN2 CAN LIN X1 32SOIC 制造商:Freescale Semiconductor 功能描述:IC, SBC, GEN2, CAN, LIN X1, 32SOIC |
| MCZ33905S5EKR2 | 功能描述:CAN 接口集成电路 5V SBC HSCAN SNGL LIN RoHS:否 制造商:Texas Instruments 类型:Transceivers 工作电源电压:5 V 电源电流: 工作温度范围:- 40 C to + 85 C 封装 / 箱体:SOIC-8 封装:Tube |
| MCZ33905S5R2 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:SBC Gen2 with CAN High Speed and LIN Interface |
| MCZ33927EK | 功能描述:功率驱动器IC THREE PHASE PRE- DRIVER RoHS:否 制造商:Micrel 产品:MOSFET Gate Drivers 类型:Low Cost High or Low Side MOSFET Driver 上升时间: 下降时间: 电源电压-最大:30 V 电源电压-最小:2.75 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Tube |
| MCZ33927EK/R2 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Three-Phase Field Effect Transistor Pre-Driver |
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