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参数资料
| 型号： | ML60851EGA |
| 厂商： | OKI ELECTRIC INDUSTRY CO LTD |
| 元件分类： | 总线控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP44 |
| 封装： | 0.80 MM PITCH, PLASTIC, QFP-44 |
| 文件页数： | 70/88页 |
| 文件大小： | 1137K |
| 代理商： | ML60851EGA |
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Oki Semiconductor
ML60851E
70/84
(5) Transmit packet ready interrupts (EP1, EP2, EP3)
These interrupts are generated when it is possible for the local MCU to write the data packet to be sent to the
USB bus from the corresponding EP.
Operation
Source of operation
Description (conditions, responses, etc.)
Transmit packet ready
interrupt generation
ML60851E
(1) In the case of bulk transfer and interrupt transfer
When the respective EP has been set for transmission,
the transmit packet ready bit of the corresponding EP is
de-asserted when it is possible to write the transmit
data into the FIFO.
At this time, an interrupt is generated if the
corresponding EP transmit packet ready interrupt
enable bit (INTENBL) has been asserted.
For the second and subsequent packets, in addition to
this condition, before the interrupt is generated, it is
necessary for an ACK response to come from the host
for the packet that has just been sent.
End of transmit packet ready
interrupt
Local MCU (firmware)
(1) In the case of bulk transfer and interrupt transfer
After the one packet of the corresponding EP transmit
data has been written in EPnTXFIFO, write a “1” into
the corresponding transmit packet ready bit (PKTRDY
register). This puts the ML60851E in a state in which it
can transmit the data and the
INTR pin is de-asserted
at the same time.
When the number of bytes in the write data is less than
the maximum payload size of the endpoint, a short
packet can be transmitted by writing a “1” into the
transmit packet ready bit (PKTRDY register).
The following table outlines the relationship between ML60851E registers and packet ready interrupt generation
during a transmit (device to host communication) operation.
INTENBL(D1/D2/D7)*
EPnCON(D7)
I
Tx PKTRDY(D5/D6/D7)*
INTSTAT(D1/D2/D7)*
1
0
X
0
1
0
1
0
1
0
X
0
X This symbol means that it does not matter whether the value is ‘1’ or ‘0’
* Use the appropriate bit field corresponding to the endpoint being considered
I
EP3 is only capable of transmission and hence this register does not play a roll in interrupt generation of EP3
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相关代理商/技术参数 |
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| ML60851ETB | 制造商:OKI 制造商全称:OKI electronic componets 功能描述:USB Device Controller |
| ML60852 | 制造商:OKI 制造商全称:OKI electronic componets 功能描述:USB Device Controller |
| ML60852A | 制造商:OKI 制造商全称:OKI electronic componets 功能描述:USB Device Controller |
| ML60852ATBZ010 | 功能描述:USB 接口集成电路 12 Mbps; USB Device Controller RoHS:否 制造商:Cypress Semiconductor 产品:USB 2.0 数据速率: 接口类型:SPI 工作电源电压:3.15 V to 3.45 V 工作电源电流: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:WLCSP-20 |
| ML60852ATBZ03A | 制造商:ROHM Semiconductor 功能描述: |
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