- 您现在的位置：买卖IC网 > PDF目录80512 > MPC5561MVZ80R (FREESCALE SEMICONDUCTOR INC) MICROCONTROLLER, PBGA324 PDF资料下载
参数资料
| 型号： | MPC5561MVZ80R |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | MICROCONTROLLER, PBGA324 |
| 封装： | 23 X 23 MM, 1 MM PITCH, MS-034AAJ-1, LEAD FREE, TEPBGA-324 |
| 文件页数： | 3/56页 |
| 文件大小： | 1044K |
| 代理商： | MPC5561MVZ80R |
第1页第2页当前第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页
Electrical Characteristics
MPC5561 Microcontroller Data Sheet, Rev. 2.0
Freescale Semiconductor
11
When powering down, VRC33 and VDDSYN have no delta requirement to each other, because the bypass
capacitors internal and external to the device are already charged. When not powering up or down, no delta
between VRC33 and VDDSYN is required for the VRC to operate within specification.
There are no power up/down sequencing requirements to prevent issues such as latch-up, excessive current
spikes, and so on. Therefore, the state of the I/O pins during power up and power down varies depending
on which supplies are powered.
Table 7 gives the pin state for the sequence cases for all pins with pad type pad_fc (fast type).
Table 8 gives the pin state for the sequence cases for all pins with pad type pad_mh (medium type) and
pad_sh (slow type).
The values in Table 7 and Table 8 do not include the effect of the weak-pull devices on the output pins
during power up.
Before exiting the internal POR state, the voltage on the pins goes to high-impedance until POR negates.
When the internal POR negates, the functional state of the signal during reset applies and the weak-pull
devices (up or down) are enabled as defined in the device Reference Manual. If VDD is too low to correctly
propagate the logic signals, the weak-pull devices can pull the signals to VDDE and VDDEH.
To avoid this condition, minimize the ramp time of the VDD supply to a time period less than the time
required to enable the external circuitry connected to the device outputs.
3.7.1
Input Value of Pins During POR Dependent on VDD33
When powering up the device, VDD33 must not lag the latest VDDSYN or RESET power pin (VDDEH6) by
more than the VDD33 lag specification listed in Table 6, spec 8. This avoids accidentally selecting the
bypass clock mode because the internal versions of PLLCFG[0:1] and RSTCFG are not powered and
Table 7. Pin Status for Fast Pads During the Power Sequence
VDDE
VDD33
VDD
POR
Pin Status for Fast Pad Output Driver
pad_fc (fast)
Low
—
Asserted
Low
VDDE
Low
Asserted
High
VDDE
Low
VDD
Asserted
High
VDDE
VDD33
Low
Asserted
High impedance (Hi-Z)
VDDE
VDD33
VDD
Asserted
Hi-Z
VDDE
VDD33
VDD
Negated
Functional
Table 8. Pin Status for Medium and Slow Pads During the Power Sequence
VDDEH
VDD
POR
Pin Status for Medium and Slow Pad Output Driver
pad_mh (medium) pad_sh (slow)
Low
—
Asserted
Low
VDDEH
Low
Asserted
High impedance (Hi-Z)
VDDEH
VDD
Asserted
Hi-Z
VDDEH
VDD
Negated
Functional
相关PDF资料 |
PDF描述 |
|---|---|
| MPC8572CVTARNB | 32-BIT, 1067 MHz, MICROPROCESSOR, PBGA1023 |
| MPC8572PXARLB | 32-BIT, 1067 MHz, MICROPROCESSOR, PBGA1023 |
| MPC8572VTAVNB | 32-BIT, 1500 MHz, MICROPROCESSOR, PBGA1023 |
| MPC8360EVVAGFGA | 32-BIT, 400 MHz, RISC PROCESSOR, PBGA740 |
| MB95F264KPFT-G-SNE2 | 8-BIT, FLASH, MICROCONTROLLER, PDSO20 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MPC5565 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Microcontroller |
| MPC5565_08 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Microcontroller |
| MPC5565AVZ112 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Microcontroller |
| MPC5565AVZ112R2 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Microcontroller |
| MPC5565AVZ132 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Microcontroller |
发布紧急采购，3分钟左右您将得到回复。