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| 型号： | MPC8541ECPXAKF |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 600 MHz, RISC PROCESSOR, PBGA783 |
| 封装： | 29 X 29 MM, 3.75 MM HEIGHT, 1 MM PITCH, FLIP CHIP, PLASTIC, BGA-783 |
| 文件页数： | 28/88页 |
| 文件大小： | 1221K |
| 代理商： | MPC8541ECPXAKF |
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MPC8541E PowerQUICC III Integrated Communications Processor Hardware Specification, Rev. 3.2
34
Freescale Semiconductor
Local Bus
Figure 15 provides the AC test load for the local bus.
Figure 15. Local Bus C Test Load
Local bus clock to address valid for LAD
LWE[0:1] = 00
tLBKLOV3
—0.8
ns
3
LWE[0:1] = 11 (default)
2.3
Output hold from local bus clock (except
LAD/LDP and LALE)
LWE[0:1] = 00
tLBKLOX1
-2.7
—
ns
3
LWE[0:1] = 11 (default)
-1.8
Output hold from local bus clock for
LAD/LDP
LWE[0:1] = 00
tLBKLOX2
-2.7
—
ns
3
LWE[0:1] = 11 (default)
-1.8
Local bus clock to output high Impedance
(except LAD/LDP and LALE)
LWE[0:1] = 00
tLBKLOZ1
—1.0
ns
5
LWE[0:1] = 11 (default)
2.4
Local bus clock to output high impedance
for LAD/LDP
LWE[0:1] = 00
tLBKLOZ2
—1.0
ns
5
LWE[0:1] = 11 (default)
2.4
Notes:
1. The symbols used for timing specifications herein follow the pattern of t(First two letters of functional block)(signal)(state)
(reference)(state) for inputs and t(First two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tLBIXKH1
symbolizes local bus timing (LB) for the input (I) to go invalid (X) with respect to the time the tLBK clock reference (K) goes
high (H), in this case for clock one(1). Also, tLBKHOX symbolizes local bus timing (LB) for the tLBK clock reference (K) to go
high (H), with respect to the output (O) going invalid (X) or output hold time.
2. All timings are in reference to LSYNC_IN for DLL enabled mode.
3. All signals are measured from OVDD/2 of the rising edge of local bus clock for DLL bypass mode to 0.4 × OVDD of the signal
in question for 3.3-V signaling levels.
4. Input timings are measured at the pin.
5. For purposes of active/float timing measurements, the Hi-Z or off state is defined to be when the total current delivered
through the component pin is less than or equal to the leakage current specification.
6. The value of tLBOTOT is defined as the sum of 1/2 or 1 ccb_clk cycle as programmed by LBCR[AHD], and the number of local
bus buffer delays used as programmed at power-on reset with configuration pins LWE[0:1].
7. Maximum possible clock skew between a clock LCLK[m] and a relative clock LCLK[n]. Skew measured between
complementary signals at OVDD/2.
8. Guaranteed by characterization.
9. Guaranteed by design.
Table 31. Local Bus General Timing Parameters - DLL Bypassed (continued)
Parameter
Configuration 7
Symbol 1
Min
Max
Unit
Notes
Output
Z0 = 50 Ω
OVDD/2
RL = 50 Ω
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MPC8541ECPXALF | 功能描述:微处理器 - MPU PQ 37 LITE 8555E RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
| MPC8541ECVTAJD | 功能描述:微处理器 - MPU PQ 37 LITE 8555E RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
| MPC8541ECVTAJD | 制造商:Freescale Semiconductor 功能描述:Microprocessor |
| MPC8541ECVTALF | 功能描述:微处理器 - MPU PQ 37 LITE 8555E RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
| MPC8541EPXAJD | 功能描述:微处理器 - MPU PQ 37 LITE 8555E RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
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