参数资料
型号: MPC8541ECPXAKF
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 600 MHz, RISC PROCESSOR, PBGA783
封装: 29 X 29 MM, 3.75 MM HEIGHT, 1 MM PITCH, FLIP CHIP, PLASTIC, BGA-783
文件页数: 49/88页
文件大小: 1221K
代理商: MPC8541ECPXAKF
MPC8541E PowerQUICC III Integrated Communications Processor Hardware Specification, Rev. 3.2
Freescale Semiconductor
53
PCI
Figure 15 provides the AC test load for PCI.
Figure 37. PCI AC Test Load
Figure 38 shows the PCI input AC timing conditions.
Figure 38. PCI Input AC Timing Measurement Conditions
HRESET high to first FRAME assertion
tPCRHFV
10
clocks
7, 10
Notes:
1. Note that the symbols used for timing specifications herein follow the pattern of t(first two letters of functional block)(signal)(state)
(reference)(state) for inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tPCIVKH
symbolizes PCI timing (PC) with respect to the time the input signals (I) reach the valid state (V) relative to the SYSCLK
clock, tSYS, reference (K) going to the high (H) state or setup time. Also, tPCRHFV symbolizes PCI timing (PC) with respect to
the time hard reset (R) went high (H) relative to the frame signal (F) going to the valid (V) state.
2. See the timing measurement conditions in the PCI 2.2 Local Bus Specifications.
3. For purposes of active/float timing measurements, the Hi-Z or off state is defined to be when the total current delivered
through the component pin is less than or equal to the leakage current specification.
4. Input timings are measured at the pin.
5. The timing parameter tSYS indicates the minimum and maximum CLK cycle times for the various specified frequencies. The
system clock period must be kept within the minimum and maximum defined ranges. For values see Section 15, “Clocking.”
6. The setup and hold time is with respect to the rising edge of HRESET.
7. The timing parameter tPCRHFV is a minimum of 10 clocks rather than the minimum of 5 clocks in the PCI 2.2 Local Bus
Specifications.
8. The reset assertion timing requirement for HRESET is 100
μs.
9. Guaranteed by characterization.
10.Guaranteed by design.
Table 42. PCI AC Timing Specifications at 66 MHz (continued)
Parameter
Symbol 1
Min
Max
Unit
Notes
Output
Z0 = 50 Ω
OVDD/2
RL = 50 Ω
tPCIVKH
CLK
Input
tPCIXKH
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相关代理商/技术参数
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MPC8541ECVTAJD 制造商:Freescale Semiconductor 功能描述:Microprocessor
MPC8541ECVTALF 功能描述:微处理器 - MPU PQ 37 LITE 8555E RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324
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