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参数资料
| 型号： | MSC8144E |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 数字信号处理 |
| 英文描述： | 0-BIT, 150 MHz, OTHER DSP, PBGA783 |
| 封装： | 29 X 29 MM, LEAD FREE, PLASTIC, FCPBGA-783 |
| 文件页数： | 40/80页 |
| 文件大小： | 2284K |
| 代理商： | MSC8144E |
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Electrical Characteristics
MSC8144E Quad Core Digital Signal Processor Data Sheet, Rev. 0
Freescale Semiconductor
45
For each baud rate at which an LP-Serial transmitter is specified to operate, the output eye pattern of the transmitter shall fall
entirely within the unshaded portion of the transmitter output compliance mask shown in Figure 13 with the parameters
specified in Table 36 when measured at the output pins of the device and the device is driving a 100
Ω ±5% differential resistive
load. The output eye pattern of an LP-Serial transmitter that implements pre-emphasis (to equalize the link and reduce
inter-symbol interference) need only comply with the transmitter output compliance mask when pre-emphasis is disabled or
minimized.
Table 33. Long Run Transmitter AC Timing Specifications—1.25 GBaud
Characteristic
Symbol
Range
Unit
Notes
Min
Max
Output Voltage,
VO
-0.40
2.30
V
Voltage relative to COMMON of either signal
comprising a differential pair
Differential Output Voltage
VDIFFPP
800
1600
mVPP
Deterministic Jitter
JD
0.17
UIPP
Total Jitter
JT
0.35
UIPP
Multiple output skew
SMO
1000
ps
Skew at the transmitter output between lanes of a
multilane link
Unit Interval
UI
800
ps
±100 ppm
Table 34. Long Run Transmitter AC Timing Specifications—2.5 GBaud
Characteristic
Symbol
Range
Unit
Notes
Min
Max
Output Voltage,
VO
-0.40
2.30
V
Voltage relative to COMMON of either signal
comprising a differential pair
Differential Output Voltage
VDIFFPP
800
1600
mVPP
Deterministic Jitter
JD
0.17
UIPP
Total Jitter
JT
0.35
UIPP
Multiple output skew
SMO
1000
ps
Skew at the transmitter output between lanes of a
multilane link
Unit Interval
UI
400
ps
±100 ppm
Table 35. Long Run Transmitter AC Timing Specifications—3.125 GBaud
Characteristic
Symbol
Range
Unit
Notes
Min
Max
Output Voltage,
VO
-0.40
2.30
V
Voltage relative to COMMON of either signal
comprising a differential pair
Differential Output Voltage
VDIFFPP
800
1600
mVPP
Deterministic Jitter
JD
0.17
UIPP
Total Jitter
JT
0.35
UIPP
Multiple output skew
SMO
1000
ps
Skew at the transmitter output between lanes of a
multilane link
Unit Interval
UI
320
ps
±100 ppm
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MSC8144EC | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Quad Core Digital Signal Processor |
| MSC8144ESVT1000B | 制造商:Freescale Semiconductor 功能描述:DSP 32-BIT 1GHZ 1000MIPS 783-PIN FCBGA BOX - Trays 制造商:Freescale Semiconductor 功能描述:ENCRYPTION PACSUN R2.1 783FCPBGA |
| MSC8144ESVT800A | 制造商:Freescale Semiconductor 功能描述:DSP 32BIT 800MHZ 800MIPS 783FCBGA - Trays |
| MSC8144ESVT800B | 制造商:Freescale Semiconductor 功能描述:DSP 32-BIT 800MHZ 800MIPS 783-PIN FCBGA EACH - Bulk 制造商:Freescale Semiconductor 功能描述:ENCRYPTION PACSUN R2.1 783FCPBGA |
| MSC8144ETVT1000A | 制造商:Freescale Semiconductor 功能描述:DSP 32-BIT 1GHZ 1000MIPS 783-PIN FCBGA - Bulk |
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