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参数资料
| 型号： | MT18LSDT1672AY-13EXX |
| 元件分类： | DRAM |
| 英文描述： | 16M X 72 SYNCHRONOUS DRAM MODULE, 5.4 ns, DMA168 |
| 封装： | LEAD FREE, MO-161, DIMM-168 |
| 文件页数： | 4/25页 |
| 文件大小： | 553K |
| 代理商： | MT18LSDT1672AY-13EXX |
64MB x72, ECC, SR), 128MB (x72, ECC, DR)
168-PIN SDRAM UDIMM
09005aef807b3709
Micron Technology, Inc., reserves the right to change products or specifications without notice.
SD9_18C8_16x72AG.fm - Rev. E 6/04 EN
12
2004 Micron Technology, Inc.
Commands
The Truth Table, below, provides a quick reference
of available commands. This is followed by written
description of each command. For a more detailed
description of commands and operations, refer to the
64Mb SDRAM component data sheet.
NOTE:
1. A0–A11 provide row address; BA0–BA1 determine which device bank is made active.
2. A0–A8 provide column address; A10 HIGH enables the auto-precharge feature (nonpersistent), while A10 LOW disables
the auto-precharge feature; BA0–BA1 determine which device bank is being read from or written to.
3. A10 LOW: BA0–BA1 determine which device bank is being precharged. A10 HIGH: all device banks are precharged and
BA0, BA1 are “Don’t Care.”
4. This command is AUTO REFRESH if CKE is HIGH, SELF REFRESH if CKE is LOW.
5. Internal refresh counter controls row addressing; all inputs and I/Os are “Don’t Care” except for CKE.
6. A0–A11 define the op-code written to the mode register and A12 should be driven LOW.
7. Activates or deactivates the DQs during WRITEs (zero-clock delay) and READs (two-clock delay).
Table 9:
SDRAM Commands and DQMB Operation Truth Table
CKE is HIGH for all commands shown except SELF REFRESH
NAME (FUNCTION)
CS# RAS# CAS#
WE#
DQMB
ADDR
DQ
NOTES
COMMAND INHIBIT (NOP)
HX
X
NO OPERATION (NOP)
LH
H
X
ACTIVE (Select bank and activate row)
LL
H
X
Bank/
Row
READ (Select bank and column, and start READ burst)
L
H
L
H
L/H
Bank/Col
X
WRITE (Select bank and column, and start WRITE
burst)
L
H
L
L/H
Bank/Col
Valid
BURST TERMINATE
LH
H
L
X
Active
PRECHARGE (Deactivate row in bank or banks)
L
H
L
X
Code
X
AUTO REFRESH or SELF REFRESH
(Enter self refresh mode)
LL
L
H
X
LOAD MODE REGISTER
L
X
Op-code
X
Write Enable/Output Enable
––
–
L
–
Active
Write Inhibit/Output High-Z
–
H
–
High-Z
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MT18LSDT1672G-10EC2 | 制造商:Micron Technology Inc 功能描述:DRAM MOD SDRAM 1.125GBIT 168RDIMM - Trays |
| MT18LSDT1672G-133C2 | 制造商:Micron Technology Inc 功能描述:16M X 72 SYNCHRONOUS DRAM MODULE, 5.4 ns, DMA168 |
| MT18LSDT1672G-13EG3 | 制造商:Micron Technology Inc 功能描述:DRAM MOD SDRAM 1.125GBIT 168RDIMM - Trays |
| MT18LSDT3272 | 制造商:Micron Technology Inc 功能描述:256MB 32MX72 SDRAM MODULE DIMM 3.3V REGISTERED - Trays |
| MT18LSDT3272AG-10EB1 | 制造商:Micron Technology Inc 功能描述: |
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