参数资料
型号: MT2VDDT832UY-75ZXX
元件分类: DRAM
英文描述: 8M X 32 DDR DRAM MODULE, 0.75 ns, DMA100
封装: LEAD FREE, DIMM-100
文件页数: 2/27页
文件大小: 420K
代理商: MT2VDDT832UY-75ZXX
32MB, 64MB (x32, SR)
100-PIN DDR UDIMM
pdf: 09005aef808ebdbc, source: 09005aef808e914b
Micron Technology, Inc., reserves the right to change products or specifications without notice.
DD2C8_16x32UG.fm - Rev. D 9/04 EN
10
2004 Micron Technology, Inc. All rights reserved.
The extended mode register must be loaded when
all device banks are idle and no bursts are in progress,
and the controller must wait the specified time before
initiating any subsequent operation. Violating either
of these requirements could result in unspecified oper-
ation.
Output Drive Strength
The normal drive strength for all outputs are speci-
fied to be SSTL2, Class II. The x16 supports a program-
mable option for reduced drive. This option is
intended for the support of the lighter load and/or
point-to-point environments. The selection of the
reduced drive strength will alter the DQ pins and DQS
pins from SSTL2, Class II drive strength to a reduced
drive strength, which is approximately 54 percent of
the SSTL2, Class II drive strength. For detailed infor-
mation on output drive strength, refer to 128Mb or
256Mb DDR SDRAM component data sheets.
DLL Enable/Disable
The DLL must be enabled for normal operation.
DLL enable is required during power-up initialization
and upon returning to normal operation after having
disabled the DLL for the purpose of debug or evalua-
tion. (When the device exits self refresh mode, the DLL
is enabled automatically.) Any time the DLL is enabled,
200 clock cycles with CKE HIGH must occur before a
READ command can be issued.
Figure 6: Extended Mode Register
Definition Diagram
NOTE:
1. BA0 and BA1 (E13 and E12 for 32MB or E14 and E13 for
64MB) must be “0, 1” to select the Extended Mode
Register (vs. the base Mode Register).
2. QFC# is not supported.
Operating Mode
Normal Operation
All other states reserved
0
0
Valid
0
1
DLL
Enable
Disable
DLL
11
01
A9
A7 A6 A5 A4 A3
A8
A2 A1 A0
Extended Mode
Register (Ex)
Address Bus
97
6
5
4
3
82
1
0
E0
0
E22
E0
E1,
Operating Mode
A10
A11
BA1 BA0
10
11
12
13
E3
E4
0
0
0
0
0
E6 E5
E7
E8
E9
0
0
E10
E11
DS
DLL
11
01
A9
A7 A6 A5 A4 A3
A8
A2 A1 A0
Extended Mode
Register (Ex)
Address Bus
97
6
5
4
3
82
1
0
Operating Mode
A10
A11
A12
BA1 BA0
10
11
12
13
14
DS
QFC#
32MB Module
64MB Module
QFC#
0
1
Drive Strength
Normal
Reduced
E1
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