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参数资料
| 型号： | NAND01GW3B2CN1E |
| 厂商： | NUMONYX |
| 元件分类： | PROM |
| 英文描述： | 128M X 8 FLASH 3V PROM, 25000 ns, PDSO48 |
| 封装： | 12 X 20 MM, ROHS COMPLIANT, PLASTIC, TSOP-48 |
| 文件页数： | 8/65页 |
| 文件大小： | 1473K |
| 代理商： | NAND01GW3B2CN1E |
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Bus operations
NAND01G-B2C
4
Bus operations
There are six standard bus operations that control the memory. Each of these is described
in this section, see Table 5: Bus operations, for a summary.
Typically, glitches of less than 5 ns on Chip Enable, Write Enable and Read Enable are
ignored by the memory and do not affect bus operations.
4.1
Command input
Command input bus operations are used to give commands to the memory. Commands are
accepted when Chip Enable is Low, Command Latch Enable is High, Address Latch Enable
is Low and Read Enable is High. They are latched on the rising edge of the Write Enable
signal. For commands that start a modify operation (write/erase) the Write Protect pin must
be High.
Only I/O0 to I/O7 are used to input commands.
4.2
Address input
Address input bus operations are used to input the memory addresses. Four bus cycles are
insertion).
The addresses are accepted when Chip Enable is Low, Address Latch Enable is High,
Command Latch Enable is Low and Read Enable is High. They are latched on the rising
edge of the Write Enable signal. For commands that start a modify operation (write/erase)
the Write Protect pin must be High. Only I/O0 to I/O7 are used to input addresses.
4.3
Data input
Data input bus operations are used to input the data to be programmed.
Data is accepted only when Chip Enable is Low, Address Latch Enable is Low, Command
Latch Enable is Low, Read Enable, and Write Protect is High. The data is latched on the
rising edge of the Write Enable signal. The data is input sequentially using the Write Enable
signal.
4.4
Data output
Data output bus operations are used to read: the data in the memory array, the status
register, the electronic signature and the unique identifier.
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| NAND512W3B3BZA1F | 64M X 8 FLASH 3V PROM, 35 ns, PBGA63 |
| NAND512W3B3CV1 | 64M X 8 FLASH 3V PROM, 35 ns, PDSO48 |
| NAND01GR4B3AV1F | 64M X 16 FLASH 1.8V PROM, 35 ns, PDSO48 |
| NAND01GW4B3CZA1E | 64M X 16 FLASH 3V PROM, 35 ns, PBGA63 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| NAND01GW3B2CN1F | 制造商:NUMONYX 制造商全称:Numonyx B.V 功能描述:1-Gbit, 2-Gbit, 2112-byte/1056-word page, 1.8 V/3 V, NAND flash memory |
| NAND01GW3B2CN6 | 制造商:STMicroelectronics 功能描述:128M X 8 FLASH 3V PROM, 35 ns, PDSO48 |
| NAND01GW3B2CN6E | 功能描述:IC FLASH 1GBIT 48TSOP RoHS:是 类别:集成电路 (IC) >> 存储器 系列:- 产品变化通告:Product Discontinuation 26/Apr/2010 标准包装:136 系列:- 格式 - 存储器:RAM 存储器类型:SRAM - 同步，DDR II 存储容量:18M（1M x 18） 速度:200MHz 接口:并联 电源电压:1.7 V ~ 1.9 V 工作温度:0°C ~ 70°C 封装/外壳:165-TBGA 供应商设备封装:165-CABGA（13x15） 包装:托盘 其它名称:71P71804S200BQ |
| NAND01GW3B2CN6F | 制造商:NUMONYX 制造商全称:Numonyx B.V 功能描述:1-Gbit, 2-Gbit, 2112-byte/1056-word page, 1.8 V/3 V, NAND flash memory |
| NAND01GW3B2CWFD | 制造商:Micron Technology Inc 功能描述:NAND - Gel-pak, waffle pack, wafer, diced wafer on film |
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