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参数资料
| 型号： | NAND512R3A0CV1F |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | PROM |
| 英文描述： | 64M X 8 FLASH 1.8V PROM, 35 ns, PDSO48 |
| 封装： | 12 X 17 MM, 0.65 MM HEIGHT, ROHS COMPLIANT, PLASTIC, USOP-48 |
| 文件页数： | 18/57页 |
| 文件大小： | 916K |
| 代理商： | NAND512R3A0CV1F |
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NAND128-A, NAND256-A, NAND512-A, NAND01G-A
Page Program
The Page Program operation is the standard oper-
ation to program data to the memory array.
The main area of the memory array is pro-
grammed by page, however partial page program-
ming is allowed where any number of bytes (1 to
528) or words (1 to 264) can be programmed.
The maximum number of consecutive partial page
program operations allowed in the same page is
three. After exceeding this a Block Erase com-
mand must be issued before any further program
operations can take place in that page.
Before starting a Page Program operation a Point-
er operation can be performed to point to the area
to be programmed. Refer to the Pointer Opera-
tions section and Figure 12. for details.
Each Page Program operation consists of five
steps (see Figure 17.):
1.
one bus cycle is required to setup the Page
Program command
2.
four bus cycles are then required to input the
program address (refer to Table 6.)
3.
the data is then input (up to 528 Bytes/ 264
Words) and loaded into the Page Buffer
4.
one bus cycle is required to issue the confirm
command to start the P/E/R Controller.
5.
The P/E/R Controller then programs the data
into the array.
Once the program operation has started the Sta-
tus Register can be read using the Read Status
Register command. During program operations
the Status Register will only flag errors for bits set
to '1' that have not been successfully programmed
to '0'.
During the program operation, only the Read Sta-
tus Register and Reset commands will be accept-
ed, all other commands will be ignored.
Once the program operation has completed the P/
E/R Controller bit SR6 is set to ‘1’ and the Ready/
Busy signal goes High.
The device remains in Read Status Register mode
until another valid command is written to the Com-
mand Interface.
Figure 17. Page Program Operation
Note: Before starting a Page Program operation a Pointer operation can be performed. Refer to Pointer Operations section for details.
I/O
RB
Address Inputs
SR0
ai07566
Data Input
10h
70h
80h
Page Program
Setup Code
Confirm
Code
Read Status Register
Busy
tBLBH2
(Program Busy time)
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| NAND512R3A2AN6T | 64M X 8 FLASH 1.8V PROM, 35 ns, PDSO48 |
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| NAND512R3A2AV1E | 64M X 8 FLASH 1.8V PROM, 35 ns, PDSO48 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| NAND512R3A2AZA6E | 功能描述:IC FLASH 512MBIT 55VFBGA RoHS:否 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:576 系列:- 格式 - 存储器:闪存 存储器类型:闪存 - NAND 存储容量:512M（64M x 8） 速度:- 接口:并联 电源电压:2.7 V ~ 3.6 V 工作温度:-40°C ~ 85°C 封装/外壳:48-TFSOP（0.724"，18.40mm 宽） 供应商设备封装:48-TSOP 包装:托盘 其它名称:497-5040 |
| NAND512R3A2BZA6E | 功能描述:闪存 128Mbit-1Gbit 1.8/3V RoHS:否 制造商:ON Semiconductor 数据总线宽度:1 bit 存储类型:Flash 存储容量:2 MB 结构:256 K x 8 定时类型: 接口类型:SPI 访问时间: 电源电压-最大:3.6 V 电源电压-最小:2.3 V 最大工作电流:15 mA 工作温度:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体: 封装:Reel |
| NAND512R3A2CZA6E | 功能描述:IC FLASH 512MBIT 63VFBGA RoHS:是 类别:集成电路 (IC) >> 存储器 系列:- 产品变化通告:Product Discontinuation 26/Apr/2010 标准包装:136 系列:- 格式 - 存储器:RAM 存储器类型:SRAM - 同步，DDR II 存储容量:18M（1M x 18） 速度:200MHz 接口:并联 电源电压:1.7 V ~ 1.9 V 工作温度:0°C ~ 70°C 封装/外壳:165-TBGA 供应商设备封装:165-CABGA（13x15） 包装:托盘 其它名称:71P71804S200BQ |
| NAND512R3A2CZA6F | 制造商:Micron Technology Inc 功能描述:SLC NAND Flash Parallel 1.8V 512Mbit 64M x 8bit 15us 63-Pin VFBGA T/R |
| NAND512R3A2DDI6 | 制造商:Micron Technology Inc 功能描述:NAND - Gel-pak, waffle pack, wafer, diced wafer on film |
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