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参数资料
| 型号： | NCN6004AFTBR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 36/40页 |
| 文件大小： | 0K |
| 描述： | IC INTERFACE SAM/SIM DUAL 48TQFP |
| 标准包装： | 1 |
| 应用： | PC，PDA |
| 接口： | 微控制器 |
| 电源电压： | 1.8 V ~ 5.5 V |
| 封装/外壳： | 48-TQFP 裸露焊盘 |
| 供应商设备封装： | 48-TQFP（7x7） |
| 包装： | 标准包装 |
| 安装类型： | 表面贴装 |
| 其它名称： | NCN6004AFTBR2GOSDKR |
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NCN6004A
http://onsemi.com
5
PIN DESCRIPTION (continued)
Pin
Description
Type
Symbol
10
RESET_A
INPUT
The signal present on this pin is translated to the RST pin of the external smart card #A. The
CS signal must be Low to validate the RESET function, regardless of the selected card.
Assuming the
mP provides two independent lines to control the RESET pins, the
NCN6004A can control two cards simultaneously.
When MUX_MODE = High, this pin provides an access to either card A or B Reset by
means of CARD_SEL selection bit.
The associated pull up resistor is either connected to VCC (EN_RPU = H) or
disconnected when EN_RPU = Low.
11
C4_A
INPUT
This pin controls the card #A C4 contact The signal can be either demultiplexed, at MPU
level, or is multiplexed with C4_B, depending upon the MUX_MODE logic state.
When MUX_MODE = High, this pin provides an access to either card A or B C4 channel
by means of CARD_SEL selection bit.
The associated pull up resistor is either connected to VCC (EN_RPU = H) or
disconnected when EN_RPU = Low.
12
C8_A
INPUT
This pin controls the card #A C8 contact. The signal can be either demultiplexed, at MPU
level, or is multiplexed with C8_B, depending upon the MUX_MODE logic state.
When MUX_MODE = High, this pin provides an access to either card A or B C8 channel
by means of CARD_SEL selection bit.
The associated pull up resistor is either connected to VCC (EN_RPU = H) or
disconnected when EN_RPU = Low.
13
CLOCK_IN_A
Clock Input,
High Impedance
The signal present on this pin comes from either the MCU master clock, or from any
signal fulfilling the logic level and frequency specifications. This signal is fed to the
internal clock selection circuit prior to be connected to the external smart card #A. Each
of the external card can have different division ratio, depending upon the state of the
CRD_SEL pin and associated programming bits. The builtin circuit can be programmed
to 1/1, 1/2, 1/4 or 1/8 frequency division ratio.
This input is valid and routed to either CRD_CLK_A _DIVIDER or
CRD_CLK_B_DIVIDER regardless of the MUX_MODE state, depending upon the
CLK_D_A/CRD_D_B and CARD_SEL programmed states (Table 1).
Although this input supports the signal coming from a crystal oscillator, care must be
observed to avoid digital levels outside the specified VIH/VIL range. Similarly, the input
clock signal shall have rise and fall times compatible with the operating frequency.
14
ANLG_GND
POWER
This pin is the ground reference for both analog and digital signals and must be
connected to the system Ground. Care must be observed to provide a copper PCB layout
designed to avoid small signals and power transients sharing the same track. Good high
frequency techniques are strongly recommended.
15
CLOCK_IN_B
Clock Input,
High Impedance
The signal present on this pin comes from either the MCU master clock, or from any
signal fulfilling the logic level and frequency specifications. This signal is fed to the
internal clock selection circuit prior to be connected to the external smart card #B. Each
of the external card can have different division ratio, depending upon the state of the
CRD_SEL pin and associated programming bits. The builtin circuit can be programmed
to 1/1, 1/2, 1/4, or 1/8 frequency division ratio.
This input is valid and routed to either CRD_CLK_B_DIVIDER or CRD_CLK_A_DIVIDER
regardless of the MUX_MODE state, depending upon the CRD_D_B/CRD_D_A and
CARD_SEL programmed states (Table 1).
Although this input supports the signal coming from a crystal oscillator, care must be
observed to avoid digital levels outside the specified VIH/VIL range. Similarly, the input
clock signal shall have rise and fall times compatible with the operating frequency.
16
C8_B
INPUT
This pin controls the card #B C8 contact. The signal can be either de multiplexed, at
MPU level, or is multiplexed with C8_A, depending upon the MUX_MODE logic state.
When MUX_MODE = High, this pin is internally disable, a pull up resistor is connected to
VCC (regardless of the logic state of EN_RPU is), and the access to card B takes place
by C8_A associated with CARD_SEL selection bit.
The associated pull up resistor is either connected to VCC (EN_RPU = H) or
disconnected when EN_RPU = Low.
17
C4_B
INPUT
This pin controls the card #B C4 contact. The signal can be either de multiplexed, at
MPU level, or is multiplexed with C8_A, depending upon the MUX_MODE logic state.
When MUX_MODE = High, this pin is internally disable, a pull up resistor is connected to
VCC, (regardless of the logic state of EN_RPU), and the access to card B takes place by
C4_A associated with CARD_SEL selection bit.
The associated pull up resistor is either connected to VCC (EN_RPU = H) or
disconnected when EN_RPU = Low.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| NCN6010 | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:SIM Card Supply and Level Shifter |
| NCN6010/D | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:SIM Card Supply and Level Shifter |
| NCN6010_06 | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:SIM Card Supply and Level Shifter |
| NCN6010D | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:SIM Card Supply and Level Shifter |
| NCN6010DTB | 功能描述:转换 - 电压电平 2.7V Sim Card RoHS:否 制造商:Micrel 类型:CML/LVDS/LVPECL to LVCMOS/LVTTL 传播延迟时间:1.9 ns 电源电流:14 mA 电源电压-最大:3.6 V 电源电压-最小:3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:MLF-8 |
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