参数资料
| 型号： | NCP1015ST65T3G |
| 厂商： | ON Semiconductor |
| 文件页数： | 10/22页 |
| 文件大小： | 0K |
| 描述： | IC OFFLINE SWIT SMPS CM SOT223 |
| 标准包装： | 4,000 |
| 输出隔离： | 隔离 |
| 频率范围： | 59kHz ~ 71kHz |
| 输入电压： | 8.1 V ~ 10 V |
| 输出电压： | 700V |
| 功率（瓦特）： | 19W |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | TO-261-4，TO-261AA |
| 供应商设备封装： | SOT-223 |
| 包装： | 带卷 (TR) |
NCP1015
P DSS + V in @ ICC1
v R lim v
I trip
ICC1
20 * 8.7 v R
limit v 1.1 m
12 * 8
6.3 m
Plugging Equation 7 and Equation 8 into Equation 6 leads
to <V ds(t) > = V in and thus:
(eq. 9)
The worse case occurs at high line, when V in equals
370 Vdc. With ICC1 = 1.2 mA (65 kHz version), we can
expect a DSS dissipation around 440 mW. If you select a
higher switching frequency version, the ICC1 increases and
it is likely that the DSS consumption exceeds 500 mW. In
that case, we recommend adding an auxiliary winding in
order to offer more dissipation room to the power MOSFET.
Please read application note AND8125/D “Evaluating the
power capability of the NCP101X members” to help
selecting the right part / configuration for your application.
Lowering the Standby Power with an Auxiliary
Winding
The DSS operation can bother the designer when a) its
dissipation is too high b) extremely low standby power is a
must. In both cases, one can connect an auxiliary winding to
disable the self ? supply. The current source then ensures the
startup sequence only and stays in the off state as long as
V CC does not drop below V CC(on) or 7.5 V. Figure 17 shows
that the insertion of a resistor (R limit ) between the auxiliary
dc level and the V CC pin is mandatory a) not to damage the
internal 8.7 V zener diode during an overshoot for instance
(absolute maximum current is 15 mA) b) to implement the
fail ? safe optocoupler protection as offered by the active
clamp. Please note that there cannot be bad interaction
between the clamping voltage of the internal zener and
V CC(off) since this clamping voltage is actually built on top
of V CC(off) with a fixed amount of offset (200 mV typical).
Self ? supplying controllers in extremely low standby
applications often puzzles the designer. Actually, if a SMPS
operated at nominal load can deliver an auxiliary voltage of
an arbitrary 16 V (V nom ), this voltage can drop to below
10 V (V stby ) when entering standby. This is because the
recurrence of the switching pulses expands so much that the
low frequency re ? fueling rate of the V CC capacitor is not
enough to keep a proper auxiliary voltage. Figure 18 shows
a typical scope shot of a SMPS entering deep standby
(output un ? loaded). So care must be taken when calculating
R limit 1) to not excess the maximum pin current in normal
operation but 2) not to drop too much voltage over R limit
when entering standby. Otherwise the DSS could reactivate
and the standby performance would degrade. We are thus
able to bound R limit between two equations:
V nom * V clamp V stby * V CC(on)
(eq. 10)
Where:
V nom is the auxiliary voltage at nominal load
V stdby is the auxiliary voltage when standby is entered
I trip is the current corresponding to the nominal operation.
It thus must be selected to avoid false tripping in overshoot
conditions.
ICC1 is the controller consumption. This number slightly
decreases compared to ICC1 from the spec since the part in
standby does almost not switch.
V CC(on) is the level above which V aux must be maintained
to keep the DSS in the OFF mode. It is good to shoot around
8 V in order to offer an adequate design margin, e.g. to not
re ? activate the startup source (which is not a problem in
itself if low standby power does not matter)
Since R limit shall not bother the controller in standby, e.g.
keep V aux to around 8 V (as selected above), we purposely
select a V nom well above this value. As explained before,
experience shows that a 40% decrease can be seen on
auxiliary windings from nominal operation down to standby
mode. Let’s select a nominal auxiliary winding of 20 V to
offer sufficient margin regarding 8 V when in standby (R limit
also drops voltage in standby). Plugging the values in
Equation 10 gives the limits within which R limit shall be
selected:
(eq. 11)
that is to say: 1.8 k W < R limit < 3.6 k W .
If we are designing a power supply delivering 12 V, then
the ratio auxiliary/power must be: 12 / 20 = 0.6. The I CC
current has to not exceed 6.4 mA. This will occur when V aux
grows ? up to: 8.7 V + 1.8 k x (6.4 m + 1.1 m) = 22.2 V for
the first boundary or 8.7 V + 3.6 k x (6.4 m +1.1 m) = 35.7 V
for second boundary. On the power output, it will
respectively give 22.6 x 0.6 = 13.3 V and 35.7 x 0.6 = 21.4 V.
As one can see, tweaking the R limit value will allow the
selection of a given overvoltage output level. Theoretically
predicting the auxiliary drop from nominal to standby is an
almost impossible exercise since many parameters are
involved, including the converter time constants. Fine
tuning of R limit thus requires a few iterations and
experiments on a breadboard to check V aux variations but
also output voltage excursion in fault. Once properly
adjusted, the fail ? safe protection will preclude any lethal
voltage runaways in case a problem would occur in the
feedback loop.
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