参数资料
| 型号： | NCP1282BDR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 17/22页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BST FLYBK VM 16SOIC |
| 标准包装： | 1 |
| PWM 型： | 电压模式 |
| 输出数： | 2 |
| 频率 - 最大： | 1MHz |
| 占空比： | 85% |
| 电源电压： | 8.5 V ~ 20 V |
| 降压： | 无 |
| 升压： | 是 |
| 回扫： | 是 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 16-SOIC（0.154"，3.90mm 宽） |
| 包装： | 剪切带 (CT) |
| 其它名称： | NCP1282BDR2GOSCT |
NCP1282
V AUX(on)
V AUX(off1)
V AUX
V inhibit
V UVOV
V REF
V SS
V out1
Figure 40. Startup Circuit Waveforms
V in
I start
I supply
The startup regulator is disabled by biasing V AUX above
V AUX(on) . This feature allows the NCP1282 to operate from
an independent 12 V supply. If operating from an
independent supply, the V in and V AUX pins should be
connected together. The independent supply should
maintain V AUX above V AUX(on) . Otherwise, the Output
Latch will not be SET and the outputs will remain OFF after
a fault condition is removed.
The startup circuit sources current into the V AUX pin. It
is recommended to place a diode between C AUX and the
auxiliary supply as shown in Figure 41. This allows the
NCP1282 to charge C AUX while preventing the startup
regulator from sourcing current into the auxiliary supply.
Auxiliary Supply or
Independent Supply
V AUX
I AUX C AUX
Disable
Figure 41. Recommended V AUX Configuration
C AUX provides power to the controller while operating
in the self-- bias or DSS mode. During the converter
powerup, C AUX must be sized such that a V AUX voltage
greater than V AUX(off2) is maintained while the auxiliary
supply voltage is building up. Otherwise, V AUX will
collapse and the controller will turn OFF. Also, the V AUX
discharge time (from 11.0 V to 9.5 V) must be greater that
the soft-- start charge period to assure the converter turns
ON. The IC bias current, gate charge load on the outputs,
and the 5.0 V reference load must be considered to
correctly size C AUX . The current consumption due to
external gate charge is calculated using Equation 1.
IAUX(gate charge) = f ? QG (eq. 1)
where, f is the operating frequency and Q G is the gate charge.
An internal supervisory circuit monitors V AUX and
prevents excessive power dissipation if the V AUX pin is
accidentally shorted. While V AUX is below 1.2 V, the
startup circuit is disabled and a current source (I inhibit )
charges V AUX with a minimum current of 50 m A. Once
V AUX reaches 1.2 V the startup circuit is enabled.
Therefore it is imperative that V AUX is not loaded (driver,
resistor divider, etc.) with more than 50 m A while V AUX is
below 1.2 V. Otherwise, V AUX will not charge. If a load
greater than 50 m A is present, a resistor can be placed
between the V in and V AUX pins to help charge V AUX to
1.2 V.
The startup circuit is rated at a maximum voltage of
500 V. If the device operates in the DSS mode, power
dissipation should be controlled to avoid exceeding the
maximum power dissipation of the controller. If dissipation
on the controller is excessive, a resistor can be placed in
series with the V in pin. This will reduce power dissipation
on the controller and transfer it to the series resistor.
Line Under/Overvoltage Detector
The same pin is used for both line undervoltage (UV) and
overvoltage (OV) detection using a novel architecture
(patent pending). This architecture allows both the UV and
OV levels to be set independently. Both the UV and OV
detectors have a 100 mV hysteresis.
http://onsemi.com
17
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