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| 型号： | NCP1910GEVB |
| 厂商： | ON Semiconductor |
| 文件页数： | 18/37页 |
| 文件大小： | 0K |
| 描述： | BOARD DEMO NCP1910DEMO-B-TLS |
| 设计资源： | NCP1910 Schematic NCP1910GEVB BOM |
| 标准包装： | 1 |
| 主要目的： | DC/DC，步降 |
| 输出及类型： | 1，非隔离 |
| 输出电压： | 最低可调至 0.8V |
| 电流 - 输出： | 3A |
| 输入电压： | 3 ~ 5.5 V |
| 稳压器拓扑结构： | 降压 |
| 频率 - 开关： | 1MHz |
| 板类型： | 完全填充 |
| 已供物品： | 板 |
| 已用 IC / 零件： | NCP1910 |
| 其它名称： | NCP1910GEVBOS |
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NCP1910
APPLICATION INFORMATION
The NCP1910 represents a new generation of control
circuit, associating two individual cores performing the
abrupt load or input voltage variations (e.g. at start up).
If the bulk voltage is too far from the regulation level:
functions of Continuous Conduction Mode (CCM) Power
Factor Correction (PFC) and LLC resonant control. These
cores interact together and implement handshake functions
in normal operating conditions but also when a fault appears.
Based on the ON Semiconductor proprietary high ? voltage
technology, the LLC section can drive the high ? side
MOSFET of the LLC half ? bridge without the need of a
gate ? drive transformer.
Power Factor Correction
? Compactness and Flexibility : the NCP1910 requires a
minimum of external components to perform a CCM
PFC operation. In particular, the circuit scheme
simplifies the PFC stage design. In addition, the circuit
offers some functions like the line brown ? out detection
or true power limiting capability that enable the
optimization of the PFC design.
? Low Consumption and Shutdown Capability : the
NCP1910 is optimized to consume a small current in all
operation modes. The consumed current is particularly
reduced during the start ? up phase and in shutdown
mode so that the power losses are minimized when the
circuit is disabled. This feature helps meet stringent
stand ? by low power specifications. Grounding the
Feed ? back pin can force the circuit to enter standby but
the on/off pin can also serve this purpose.
? Maximum Current Limit : the circuit permanently
senses the inductor current and immediately turns off
the power switch if it is higher than the set current
limit. The NCP1910 also prevents any turn on of the
power switch as long as the inductor current is not
below its maximum permissible level. This feature
protects the MOSFET from possible excessive stress
that could result from the switching of a current higher
than the one the power switch is dimensioned for. In
particular, this scheme effectively protects the PFC
stage during the start ? up phase when large in ? rush
currents charge the bulk capacitor.
? Under ? Voltage Protection for Open Loop
Protection : the circuit detects when the feed ? back
voltage goes below than about 8% of the regulation
level. In this case, the circuit turns off and its
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? Over ? Voltage Protection : NCP1910 turns off the
power switch as soon as V bulk exceeds the OVP
threshold (105% of the regulation level). This is an
auto ? recovery function.
? Dynamic Response Enhancer : NCP1910
drastically speeds up the regulation loop by its
internal 200 m A current source, activated when the
bulk voltage drops below 95% of its regulation level.
Line Brown ? Out Detection : the circuit detects low ac
line conditions and disables the PFC stage in this case.
This protection mainly protects the power switch from
the excessive stress that could damage it in such
conditions.
Over ? Power Limitation : the NCP1910 computes the
maximum permissible current in dependence of the
average input voltage measured by the brown ? out
block. It is the second OCP with a threshold that is line
dependent. When the circuit detects an excessive power
transfer, it resets the driver output immediately.
Redundant Over ? Voltage Protection : As a redundant
safety feature, the NCP1910 offers a second latched
OVP whose input is available on OVP2 pin. If the
voltage on this pin is above the maximum allowable
voltage, the PFC and the LCC are latched off.
PFC Abnormal Protection : When PFC faces an
abnormal situation so that the bulk voltage is under
regulation longer than the allowable timing, the PFC
and LLC are latched off.
Frequency Foldback : in light output loading
conditions, the user has the ability to program a point
on the V CTRL pin where the oscillator frequency is
gradually reduced. This helps to maintain an adequate
efficiency on the PFC power stage alone.
Soft ? Start : to offer a clean start ? up sequence and limit
both the stress on the power MOSFET and the bulk
voltage overshoot, a 30 m A current source charges the
compensation network installed on V CTRL pin and
makes V CTRL raise gradually.
Output Stage Totem Pole : the NCP1910 incorporates
a ± 1.0 A gate driver to efficiently drive TO220 or
TO247 power MOSFETs.
?
consumption drops to a very low value. This feature
protects the PFC stage from starting operation in case
of low ac line conditions or in case of a failure in the
feed ? back network (i.e. bad connection). In case the
UVP circuitry is activated, the Power Good signal is
disabled and the LLC circuit stops immediately.
Fast Transient Response : given the low bandwidth of
the regulation block, the output voltage of PFC stages
LLC Controller
? Wide frequency operation : the part can operate to a
frequency up to 500 kHz by connecting a resistive
network from R t pin to ground. One resistor sets the
maximum switching frequency whereas a second
resistor set the minimum frequency.
may exhibit excessive over or under ? shoots because of
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