参数资料
型号: NCP1910GEVB
厂商: ON Semiconductor
文件页数: 23/37页
文件大小: 0K
描述: BOARD DEMO NCP1910DEMO-B-TLS
设计资源: NCP1910 Schematic
NCP1910GEVB BOM
标准包装: 1
主要目的: DC/DC,步降
输出及类型: 1,非隔离
输出电压: 最低可调至 0.8V
电流 - 输出: 3A
输入电压: 3 ~ 5.5 V
稳压器拓扑结构: 降压
频率 - 开关: 1MHz
板类型: 完全填充
已供物品:
已用 IC / 零件: NCP1910
其它名称: NCP1910GEVBOS
NCP1910
V LBO + 2 V ac,rms
Conversely, if V LBO goes below 1 V, V LBOcomp turns high
and a 980 mV voltage source, V LBO(clamp) , is connected to
the LBO pin to maintain the pin level near 1 V. Then a 50 ms
blanking delay, t LBO(blank) , is activated during which no
fault is detected. The main goal of the 50 ms lag is to help
@
R LBOL
R LBOU ) R LBOL
R LBOU @ R LBOL
R LBOU ) R LBOL
* I LBOH
R LBOL
R LBOU ) R LBOL
V LBO + 2 V ac,rms
LBOU ) R LBOL
2 p R LBOU R LBOL C LBO
f LBO +
meet the hold ? up requirements. In case of a short mains
interruption, no fault is detected and hence, both PFC and
LLC keep operating. In addition, LBO pin being kept at
980 mV, there is almost no extra delay between the line
recovery and the occurrence of a proper voltage applied to
LBO pin, that otherwise would exist because of the large
capacitor typically placed between LBO pin and ground to
filter the input voltage ripple. As a result, the NCP1910
effectively “blanks” any mains interruption that is shorter
than 25 ms (minimum guaranteed value of the 50 ms timer).
At the end of this blanking delay (t LBO(blank) ), another
timer is activated that sets a 50 ms window during which a
fault can be detected. This is the role of the t LBO(window) in
Figure 46:
? If V LBOcomp is high during the second 50 ms delay
(t LBO(window) ), a line brown ? out condition is confirmed
and PFC_BO signal is asserted high.
? If V LBOcomp remains low for the duration of the
t LBO(window) , no fault is detected.
When the PFC_BO signal is high:
? The PFC driver is disabled, and the V CTRL pin is
grounded to recover operation with a soft ? start when
the fault has gone.
? The V LBO(clamp) voltage source is removed from LBO
pin.
? The I LBOH current source (7 m A typically) is enabled
that lowers the LBO pin voltage for hysteresis purpose.
At startup, a pnp transistor ensures that the LBO pin
voltage remains below when: V CC < UVLO or ON/OFF pin
is released open or UVP or Thermal Shutdown. This is to
guarantee that the circuit starts operation in the right state,
which is “PFC_BO” high. When the NCP1910 is ready to
work, the pnp transistor turns off and the circuit enables the
I LBOH .
Also, I LBOH is enabled whenever the part is in off mode,
but at startup, I LBOH is disabled until V CC reaches V CC(on) .
If R LBOL << R LBOU ,
(eq. 9)
V LBO ] 2 V ac,rms * I LBOH R LBOL
? After the PFC stage has started operation, the input
voltage becomes a rectified sinusoid and the average
voltage becomes <V in > = (2/ p ) √ 2 V ac,rms , which
decays 2/ π of the peak value of rms input voltage.
Hence, the average voltage applied to LBO pin is:
<V LBO > = (2/ p ) √ 2 V ac,rms R LBOL /(R LBOU + R LBOL ).
And because of the ripple on the LBO pin, the
minimum value of V LBO is around:
2 R LBOL
p R
(eq. 10)
f LBO
1 *
3 f line
Where:
? f LBO is the sensing network pole frequency.
R LBOU ) R LBOL
f LBO +
? f line is the line frequency.
? R LBOL is low side resistor of the dividing resistors
between LBO pin and ground.
? R LBOU is upper side resistor of the dividing resistors
between V in and LBO pin.
The term f LBO of Equation 10 enables to take into
1 *
3 f line
account the LBO pin voltage ripple (first approximation).
If as a rule of the thumb, we will assume that f line .
10
Re ? arranging the Equation 9 and 10, the network connected
to LBO pin can be calculated with the following equations:
@ @ * 1 @
V ac,off
I LBOH
1 * 3 LBO
line
@ @ * 1 @
V ac,off
I LBOH
Line Brown ? Out Network Calculation
If the line brown ? out network is connected to the voltage
after bridge diode, the monitored voltage can be very
different depending on the phase:
? Before operation, the PFC stage is off and the input
bridge acts as a peak detector. As a consequence, the
input voltage is approximately flat and nearly equates
R LBOL +
^
f
0.967 2
f 2
1 p V ac,on V LBOT
1 p V ac,on V LBOT
(eq. 11)
the ac line amplitude: <V in > = √ 2 V ac,rms , where V ac,rms
is the rms voltage of the line. As depicted in previous
section, the I LBOH turns on before PFC operates for the
purpose of adjustable line brown ? out hysteresis; hence,
the average voltage applied to LBO pin is:
R LBOU +
Where:
2 @ V ac,on
I LBOH R LBOL ) V LBOT
(eq. 12)
* 1 R LBOL
http://onsemi.com
23
相关PDF资料
PDF描述
NCP3418BMNR2G IC MOSFET DRIVER DUAL 12V 10-DFN
NCP3418DR2 IC MOSFET DRIVER DUAL 12V 8-SOIC
NCP3420DR2G IC MOSFET DRIVER DUAL 12V 8-SOIC
NCP3488DR2G IC MOSFET DRVR DUAL 12V 8-SOIC
NCP5007SNT1 IC LED DRIVR WHT COMPACT 5TSOP
相关代理商/技术参数
参数描述
NCP1927DR2G 功能描述:功率因数校正 IC PFC AND FLYBACK CONTROLER RoHS:否 制造商:Fairchild Semiconductor 开关频率:300 KHz 最大功率耗散: 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Reel
NCP1937A1DR2G 制造商:ON Semiconductor 功能描述:COMBO PFC & QUAZI FLYBACK - Tape and Reel 制造商:ON Semiconductor 功能描述:REEL / COMBO PFC & QUAZI FLYBACK
NCP1937B1DR2G 制造商:ON Semiconductor 功能描述:COMBO PFC & QUAZI FLYBACK - Tape and Reel
NCP1937BADAPGEVB 制造商:ON Semiconductor 功能描述:ADPTR 90W PFC+QR<10MW - Bulk 制造商:ON Semiconductor 功能描述:BOARD EVAL FOR NCP1937 制造商:ON Semiconductor 功能描述:Power Management IC Development Tools 90 W Adapter PFC+QR 10 MW Eval Brd
NCP21WB333 制造商:MURATA 制造商全称:Murata Manufacturing Co., Ltd. 功能描述:for Surface Mounting Application