参数资料
型号: NCP5393BMNR2G
厂商: ON Semiconductor
文件页数: 14/24页
文件大小: 0K
描述: IC CTLR 2/3/4PHASE CPU 48QFN
标准包装: 2,500
应用: 控制器,CPU
输入电压: 4.75 V ~ 5.25 V
输出数: 1
输出电压: 0.013 V ~ 1.55 V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 48-VFQFN 裸露焊盘
供应商设备封装: 48-QFN(7x7)
包装: 带卷 (TR)
NCP5393B
CPU Support
NCP5393B is able to detect the CPU it is going to supply
and configure itself to PVI or SVI mode. When in PVI mode,
to address the CORE section the NCP5393B uses VID[5:0].
When in SVI mode NCP5393B uses VID2 and VID3 alone
for SVC and SVD information respectively. Whether the
controller is controlled by the serial or parallel interface is
determined by sampling the VID1 line at the time that the
voltage regulator enable line is asserted; if the VID1 line is
high when Enable is asserted, the voltage regulator starts in
PVI mode, otherwise the voltage regulator starts in SVI
mode.
PVI ? Parallel Interface
PVI is a 6 ? bit wide parallel interface to address the CORE
Section reference. NB is kept in HiZ mode. Parallel mode
operation is depicted in Figure 9. Voltage identifications for
the 6bit AMD mode is given in Table 2.
?
?
?
?
? The NCP5393B will sample the VID1 line to
determine whether to start in SVI or PVI mode.
PVID mode is determined when VID1 = High.
? The NCP5393B samples the voltage on the PSI_L
pin in order to determine the desired operating
configuration during power saving mode.
? The Boot VID is captured from decoding the
voltages on the VID[0:5].
The NCP5393B V DD regulator will soft ? start and ramp
to the initial Boot VID. The VDDNB regulator remains
off (high ? Z output).
PWRGOOD is asserted by the NCP5393B.
PWROK is not used in PVID mode.
The NCP5393B will accept new VID codes on the
parallel VID interface (See Table 2).
See Figure 9 for details.
The normal PVI startup sequence for the NCP5393B is as
follows:
? 5 V is applied to the VCCA and VCCB pins to power
the NCP5393B and 12 V is applied to 12VMON.
? The NCP5393B samples the load on the G4 and G2
pins. If these pins are tied to ground the operating mode
will be altered from four phase mode, to three phase, or
two phase operation.
? The system power sequence logic asserts the
NCP5393B ENABLE pin:
Table 1. Metal VID/BOOT VID
SVC SVD
0 0
0 1
1 0
1 1
Output Voltage
Pre ? PWROK Metal VID
1.1 V
1.0 V
0.9 V
0.8 V
DC IN
With ENABLE assertion, the PSI_L Phase Shed Strategy is Locked
therefore Voltages on PSI_L must be stable prior to ENABLE assertion.
VDDIO
VR Turn ? On
Command
VR Turn ? Off
Command
ENABLE
BOOT VID MSB
VID[5]
PVIEN/
VID[1]
VID[1] High at Rise of Enable Selects PVI Operation
BOOT VID LSB
VID[0]
At end of soft ? start, PSI_L can be asserted.
VDD ONLY
[NDDNB N/A]
PWRGOOD
PWROK IS N/A
Output Rises to BOOT
VID at SS Rate
Soft ? Start is
Complete
Further VDD Transition(s)
at Regular Slew Rate
PWRGOOD
De ? Assertion
Occurs on
VR Turn ? Off Command
Forces PWRGOOD Low
Faults Only
Figure 9. Power Up Sequences in Parallel Mode Operation
http://onsemi.com
14
相关PDF资料
PDF描述
NCP5395GMNR2G IC PHASE CONTROLLER 2/3/4 48-QFN
NCP5395MNR2G IC PHASE CONTROLLER 2/3/4 48-QFN
NCP5395TMNR2G IC PHASE CONTROLLER 2/3/4 48-QFN
NCP5422ADR2 IC REG CTRLR BUCK PWM 16-SOIC
NCP5424DR2G IC REG CTRLR BUCK PWM 16-SOIC
相关代理商/技术参数
参数描述
NCP5393MNR2G 功能描述:马达/运动/点火控制器和驱动器 2/3/4 PHASE CONTROLR RoHS:否 制造商:STMicroelectronics 产品:Stepper Motor Controllers / Drivers 类型:2 Phase Stepper Motor Driver 工作电源电压:8 V to 45 V 电源电流:0.5 mA 工作温度:- 25 C to + 125 C 安装风格:SMD/SMT 封装 / 箱体:HTSSOP-28 封装:Tube
NCP5395 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:CPU Applications
NCP5395GMNR2G 功能描述:DC/DC 开关控制器 2/3/4 PH CONTROLLER/ DRIVE RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK
NCP5395MNR2G 功能描述:DC/DC 开关控制器 2/3/4 PH CTRL/DRIVE RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK
NCP5395T 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:2/3/4-Phase Controller with On Board Gate Drivers for CPU Applications