参数资料
| 型号： | NCP5422ADR2 |
| 厂商： | ON Semiconductor |
| 文件页数： | 11/16页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM 16-SOIC |
| 产品变化通告： | Product Obsolescence 11/Feb/2009 |
| 标准包装： | 2,500 |
| PWM 型： | 电流/电压模式，V²? |
| 输出数： | 1 |
| 频率 - 最大： | 750kHz |
| 占空比： | 100% |
| 电源电压： | 10.8 V ~ 13.2 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | 0°C ~ 70°C |
| 封装/外壳： | 16-SOIC（0.154"，3.90mm 宽） |
| 包装： | 带卷 (TR) |
| 其它名称： | NCP5422ADR2OS |
NCP5422A
Iin(Avg) + 1
where:
I L(VALLEY) = inductor valley current.
Input Capacitor Selection
The choice and number of input capacitors is determined
by their voltage and ripple current ratings. The designer
must choose capacitors that will support the worst case input
voltage with an adequate margin. To calculate the number of
input capacitors one must first determine the RMS ripple
current through the capacitors. To this end, first calculate the
average input current to the converter:
V · I1 ) V2 · I2 where h is the expected
h · Vin efficiency (typical X 85%)
ESL = Maximum allowable ESL including capacitors,
circuit traces, and vias;
ESR = Maximum allowable ESR including capacitors
and circuit traces;
t TR = output voltage transient response time.
The designer has to independently assign values for the
change in output voltage due to ESR, ESL, and output
capacitor discharging or charging. Empirical data indicates
that most of the output voltage change (droop or spike
depending on the load current transition) results from the
total output capacitor ESR.
The maximum allowable ESR can then be determined
according to the formula:
With the average input current determined, the RMS
ripple current through the input capacitor will be:
ESRMAX +
D VESR
D IOUT
Irms +
Io12 )
Ip12
3
· D1 ) Io22 )
Ip22
3
· D2-Iin2
where:
D V ESR = change in output voltage due to ESR (assigned
Number of capacitors +
D VESL D t
ESLMAX +
D VOUT + D IOUT ESL ) ESR ) tTR
where:
I o1,2 is the maximum DC output current for channel 1 and
2 respectively.
I p1,2 is the peak inductor current (1/2 D I L ) for channel's
1 and 2 respectively. If the channel peak inductor current
is less than 50% of the channel output current it may be
neglected.
D 1,2 is the channel duty cycle. Here it is assumed that each
channel's duty cycle is less than 50% so that each phase
does not overlap.
Once the RMS ripple current has been determined, the
required number of input capacitor's needed is based on the
rated RMS ripple current rating of the chosen capacitor.
Selection of the Output Capacitors
These components must be selected and placed carefully
to yield optimal results. Capacitors should be chosen to
provide acceptable ripple on the regulator output voltage.
Key specifications for output capacitors are their ESR
(Equivalent Series Resistance), and ESL (Equivalent Series
Inductance). For best transient response, a combination of
low value/high frequency and bulk capacitors placed close
to the load will be required.
In order to determine the number of output capacitors the
maximum voltage transient allowed during load transitions
has to be specified. The output capacitors must hold the
output voltage within these limits since the inductor current
can not change with the required slew rate. The output
capacitors must therefore have a very low ESL and ESR.
The voltage change during the load current transient is:
D t COUT
where:
D I OUT / D t = load current slew rate;
D I OUT = load transient;
D t = load transient duration time;
by the designer)
Once the maximum allowable ESR is determined, the
number of output capacitors can be found by using the
formula:
ESRCAP
ESRMAX
where:
ESR CAP = maximum ESR per capacitor (specified in
manufacturer's data sheet).
ESR MAX = maximum allowable ESR.
The actual output voltage deviation due to ESR can then
be verified and compared to the value assigned by the
designer:
D VESR + D IOUT ESRMAX
Similarly, the maximum allowable ESL is calculated from
the following formula:
D I
Selection of the Input Inductor
A common requirement is that the buck controller must
not disturb the input voltage. One method of achieving this
is by using an input inductor and a bypass capacitor. The
input inductor isolates the supply from the noise generated
in the switching portion of the buck regulator and also limits
the inrush current into the input capacitors upon power up.
The inductor's limiting effect on the input current slew rate
becomes increasingly beneficial during load transients. The
worst case is when the load changes from no load to full load
(load step), a condition under which the highest voltage
change across the input capacitors is also seen by the input
inductor. The inductor successfully blocks the ripple current
while placing the transient current requirements on the input
bypass capacitor bank, which has to initially support the
sudden load change.
http://onsemi.com
11
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| NCP5422ADR2G | 功能描述:DC/DC 开关控制器 Dual Out-Of-Phase Synchronous Buck RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| NCP5422EVB | 功能描述:电源管理IC开发工具 ANA SW REG EVAL BRD RoHS:否 制造商:Maxim Integrated 产品:Evaluation Kits 类型:Battery Management 工具用于评估:MAX17710GB 输入电压: 输出电压:1.8 V |
| NCP5423 | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:Dual Out−of−Phase Synchronous Buck Controller with Current Limit |
| NCP5423DR2G | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:Dual Out−of−Phase Synchronous Buck Controller with Current Limit |
| NCP5424 | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:Dual Synchronous Buck Controller with Input Current Sharing |
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